Skip to content

Commit d90468d

Browse files
zixuan-wuzixuan-wu
committed
[CSKY] Add support for half-precision floats
Complete fp16 support by ensuring that load extension / truncate store operations are properly expanded.
1 parent fc4350c commit d90468d

File tree

2 files changed

+318
-1
lines changed

2 files changed

+318
-1
lines changed

‎llvm/lib/Target/CSKY/CSKYISelLowering.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,8 @@ CSKYTargetLowering::CSKYTargetLowering(const TargetMachine &TM,
117117
};
118118

119119
ISD::NodeType FPOpToExpand[] = {ISD::FSIN, ISD::FCOS, ISD::FSINCOS,
120-
ISD::FPOW, ISD::FREM, ISD::FCOPYSIGN};
120+
ISD::FPOW, ISD::FREM, ISD::FCOPYSIGN,
121+
ISD::FP16_TO_FP, ISD::FP_TO_FP16};
121122

122123
if (STI.useHardFloat()) {
123124

@@ -136,10 +137,14 @@ CSKYTargetLowering::CSKYTargetLowering(const TargetMachine &TM,
136137

137138
if (STI.hasFPUv2SingleFloat() || STI.hasFPUv3SingleFloat()) {
138139
setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
140+
setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
141+
setTruncStoreAction(MVT::f32, MVT::f16, Expand);
139142
}
140143
if (STI.hasFPUv2DoubleFloat() || STI.hasFPUv3DoubleFloat()) {
141144
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand);
142145
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
146+
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
147+
setTruncStoreAction(MVT::f64, MVT::f16, Expand);
143148
}
144149
}
145150

‎llvm/test/CodeGen/CSKY/fpu/fp16-promote.ll

Lines changed: 312 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,312 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf,+fpuv2_df | FileCheck %s --check-prefix=CHECK-FPUV2
3+
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf,+fpuv3_df | FileCheck %s --check-prefix=CHECK-FPUV3
4+
5+
define void @test_load_store(ptr %p, ptr %q) nounwind {
6+
; CHECK-FPUV2-LABEL: test_load_store:
7+
; CHECK-FPUV2: # %bb.0:
8+
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
9+
; CHECK-FPUV2-NEXT: st16.h a0, (a1, 0)
10+
; CHECK-FPUV2-NEXT: rts16
11+
;
12+
; CHECK-FPUV3-LABEL: test_load_store:
13+
; CHECK-FPUV3: # %bb.0:
14+
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
15+
; CHECK-FPUV3-NEXT: st16.h a0, (a1, 0)
16+
; CHECK-FPUV3-NEXT: rts16
17+
%a = load half, ptr %p
18+
store half %a, ptr %q
19+
ret void
20+
}
21+
22+
define float @test_fpextend_float(ptr %p) nounwind {
23+
; CHECK-FPUV2-LABEL: test_fpextend_float:
24+
; CHECK-FPUV2: # %bb.0:
25+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 4
26+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
27+
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
28+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI1_0]
29+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
30+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 4
31+
; CHECK-FPUV2-NEXT: rts16
32+
; CHECK-FPUV2-NEXT: .p2align 1
33+
; CHECK-FPUV2-NEXT: # %bb.1:
34+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
35+
; CHECK-FPUV2-NEXT: .LCPI1_0:
36+
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
37+
;
38+
; CHECK-FPUV3-LABEL: test_fpextend_float:
39+
; CHECK-FPUV3: # %bb.0:
40+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 4
41+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
42+
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
43+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI1_0]
44+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
45+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 4
46+
; CHECK-FPUV3-NEXT: rts16
47+
; CHECK-FPUV3-NEXT: .p2align 1
48+
; CHECK-FPUV3-NEXT: # %bb.1:
49+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
50+
; CHECK-FPUV3-NEXT: .LCPI1_0:
51+
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
52+
%a = load half, ptr %p
53+
%r = fpext half %a to float
54+
ret float %r
55+
}
56+
57+
define double @test_fpextend_double(ptr %p) nounwind {
58+
; CHECK-FPUV2-LABEL: test_fpextend_double:
59+
; CHECK-FPUV2: # %bb.0:
60+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 4
61+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
62+
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
63+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI2_0]
64+
; CHECK-FPUV2-NEXT: fstod vr0, vr0
65+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
66+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 4
67+
; CHECK-FPUV2-NEXT: rts16
68+
; CHECK-FPUV2-NEXT: .p2align 1
69+
; CHECK-FPUV2-NEXT: # %bb.1:
70+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
71+
; CHECK-FPUV2-NEXT: .LCPI2_0:
72+
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
73+
;
74+
; CHECK-FPUV3-LABEL: test_fpextend_double:
75+
; CHECK-FPUV3: # %bb.0:
76+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 4
77+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
78+
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
79+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI2_0]
80+
; CHECK-FPUV3-NEXT: fstod vr0, vr0
81+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
82+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 4
83+
; CHECK-FPUV3-NEXT: rts16
84+
; CHECK-FPUV3-NEXT: .p2align 1
85+
; CHECK-FPUV3-NEXT: # %bb.1:
86+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
87+
; CHECK-FPUV3-NEXT: .LCPI2_0:
88+
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
89+
%a = load half, ptr %p
90+
%r = fpext half %a to double
91+
ret double %r
92+
}
93+
94+
define void @test_fptrunc_float(float %f, ptr %p) nounwind {
95+
; CHECK-FPUV2-LABEL: test_fptrunc_float:
96+
; CHECK-FPUV2: # %bb.0:
97+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 8
98+
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
99+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
100+
; CHECK-FPUV2-NEXT: mov16 l0, a0
101+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI3_0]
102+
; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)
103+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
104+
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
105+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 8
106+
; CHECK-FPUV2-NEXT: rts16
107+
; CHECK-FPUV2-NEXT: .p2align 1
108+
; CHECK-FPUV2-NEXT: # %bb.1:
109+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
110+
; CHECK-FPUV2-NEXT: .LCPI3_0:
111+
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
112+
;
113+
; CHECK-FPUV3-LABEL: test_fptrunc_float:
114+
; CHECK-FPUV3: # %bb.0:
115+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 8
116+
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
117+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
118+
; CHECK-FPUV3-NEXT: mov16 l0, a0
119+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI3_0]
120+
; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)
121+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
122+
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
123+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 8
124+
; CHECK-FPUV3-NEXT: rts16
125+
; CHECK-FPUV3-NEXT: .p2align 1
126+
; CHECK-FPUV3-NEXT: # %bb.1:
127+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
128+
; CHECK-FPUV3-NEXT: .LCPI3_0:
129+
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
130+
%a = fptrunc float %f to half
131+
store half %a, ptr %p
132+
ret void
133+
}
134+
135+
define void @test_fptrunc_double(double %d, ptr %p) nounwind {
136+
; CHECK-FPUV2-LABEL: test_fptrunc_double:
137+
; CHECK-FPUV2: # %bb.0:
138+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 8
139+
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
140+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
141+
; CHECK-FPUV2-NEXT: mov16 l0, a0
142+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI4_0]
143+
; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)
144+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
145+
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
146+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 8
147+
; CHECK-FPUV2-NEXT: rts16
148+
; CHECK-FPUV2-NEXT: .p2align 1
149+
; CHECK-FPUV2-NEXT: # %bb.1:
150+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
151+
; CHECK-FPUV2-NEXT: .LCPI4_0:
152+
; CHECK-FPUV2-NEXT: .long __truncdfhf2
153+
;
154+
; CHECK-FPUV3-LABEL: test_fptrunc_double:
155+
; CHECK-FPUV3: # %bb.0:
156+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 8
157+
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
158+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
159+
; CHECK-FPUV3-NEXT: mov16 l0, a0
160+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI4_0]
161+
; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)
162+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
163+
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
164+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 8
165+
; CHECK-FPUV3-NEXT: rts16
166+
; CHECK-FPUV3-NEXT: .p2align 1
167+
; CHECK-FPUV3-NEXT: # %bb.1:
168+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
169+
; CHECK-FPUV3-NEXT: .LCPI4_0:
170+
; CHECK-FPUV3-NEXT: .long __truncdfhf2
171+
%a = fptrunc double %d to half
172+
store half %a, ptr %p
173+
ret void
174+
}
175+
176+
define void @test_fadd(ptr %p, ptr %q) nounwind {
177+
; CHECK-FPUV2-LABEL: test_fadd:
178+
; CHECK-FPUV2: # %bb.0:
179+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 20
180+
; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill
181+
; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
182+
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
183+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
184+
; CHECK-FPUV2-NEXT: mov16 l0, a1
185+
; CHECK-FPUV2-NEXT: mov16 l1, a0
186+
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
187+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]
188+
; CHECK-FPUV2-NEXT: fmovs vr8, vr0
189+
; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)
190+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]
191+
; CHECK-FPUV2-NEXT: fadds vr0, vr8, vr0
192+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_1]
193+
; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)
194+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
195+
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
196+
; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
197+
; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload
198+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 20
199+
; CHECK-FPUV2-NEXT: rts16
200+
; CHECK-FPUV2-NEXT: .p2align 1
201+
; CHECK-FPUV2-NEXT: # %bb.1:
202+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
203+
; CHECK-FPUV2-NEXT: .LCPI5_0:
204+
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
205+
; CHECK-FPUV2-NEXT: .LCPI5_1:
206+
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
207+
;
208+
; CHECK-FPUV3-LABEL: test_fadd:
209+
; CHECK-FPUV3: # %bb.0:
210+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 20
211+
; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill
212+
; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
213+
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
214+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
215+
; CHECK-FPUV3-NEXT: mov16 l0, a1
216+
; CHECK-FPUV3-NEXT: mov16 l1, a0
217+
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
218+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]
219+
; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0
220+
; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)
221+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]
222+
; CHECK-FPUV3-NEXT: fadd.32 vr0, vr8, vr0
223+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_1]
224+
; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)
225+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
226+
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
227+
; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
228+
; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload
229+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 20
230+
; CHECK-FPUV3-NEXT: rts16
231+
; CHECK-FPUV3-NEXT: .p2align 1
232+
; CHECK-FPUV3-NEXT: # %bb.1:
233+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
234+
; CHECK-FPUV3-NEXT: .LCPI5_0:
235+
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
236+
; CHECK-FPUV3-NEXT: .LCPI5_1:
237+
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
238+
%a = load half, ptr %p
239+
%b = load half, ptr %q
240+
%r = fadd half %a, %b
241+
store half %r, ptr %p
242+
ret void
243+
}
244+
245+
define void @test_fmul(ptr %p, ptr %q) nounwind {
246+
; CHECK-FPUV2-LABEL: test_fmul:
247+
; CHECK-FPUV2: # %bb.0:
248+
; CHECK-FPUV2-NEXT: subi16 sp, sp, 20
249+
; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill
250+
; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
251+
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
252+
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
253+
; CHECK-FPUV2-NEXT: mov16 l0, a1
254+
; CHECK-FPUV2-NEXT: mov16 l1, a0
255+
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
256+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]
257+
; CHECK-FPUV2-NEXT: fmovs vr8, vr0
258+
; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)
259+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]
260+
; CHECK-FPUV2-NEXT: fmuls vr0, vr8, vr0
261+
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_1]
262+
; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)
263+
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
264+
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
265+
; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
266+
; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload
267+
; CHECK-FPUV2-NEXT: addi16 sp, sp, 20
268+
; CHECK-FPUV2-NEXT: rts16
269+
; CHECK-FPUV2-NEXT: .p2align 1
270+
; CHECK-FPUV2-NEXT: # %bb.1:
271+
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
272+
; CHECK-FPUV2-NEXT: .LCPI6_0:
273+
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
274+
; CHECK-FPUV2-NEXT: .LCPI6_1:
275+
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
276+
;
277+
; CHECK-FPUV3-LABEL: test_fmul:
278+
; CHECK-FPUV3: # %bb.0:
279+
; CHECK-FPUV3-NEXT: subi16 sp, sp, 20
280+
; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill
281+
; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
282+
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
283+
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
284+
; CHECK-FPUV3-NEXT: mov16 l0, a1
285+
; CHECK-FPUV3-NEXT: mov16 l1, a0
286+
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
287+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]
288+
; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0
289+
; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)
290+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]
291+
; CHECK-FPUV3-NEXT: fmul.32 vr0, vr8, vr0
292+
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_1]
293+
; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)
294+
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
295+
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
296+
; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
297+
; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload
298+
; CHECK-FPUV3-NEXT: addi16 sp, sp, 20
299+
; CHECK-FPUV3-NEXT: rts16
300+
; CHECK-FPUV3-NEXT: .p2align 1
301+
; CHECK-FPUV3-NEXT: # %bb.1:
302+
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
303+
; CHECK-FPUV3-NEXT: .LCPI6_0:
304+
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
305+
; CHECK-FPUV3-NEXT: .LCPI6_1:
306+
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
307+
%a = load half, ptr %p
308+
%b = load half, ptr %q
309+
%r = fmul half %a, %b
310+
store half %r, ptr %p
311+
ret void
312+
}

0 commit comments

Comments
 (0)