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[DAG] Defer merge store cycle checking to just before merge. NFCI.
llvm-svn: 332489
1 parent d6c2ca8 commit d9d86cb

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+20
-8
lines changed

1 file changed

+20
-8
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 20 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -13473,14 +13473,6 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
1347313473
continue;
1347413474
}
1347513475

13476-
// Check that we can merge these candidates without causing a cycle
13477-
if (!checkMergeStoreCandidatesForDependencies(StoreNodes,
13478-
NumConsecutiveStores)) {
13479-
StoreNodes.erase(StoreNodes.begin(),
13480-
StoreNodes.begin() + NumConsecutiveStores);
13481-
continue;
13482-
}
13483-
1348413476
// The node with the lowest store address.
1348513477
LLVMContext &Context = *DAG.getContext();
1348613478
const DataLayout &DL = DAG.getDataLayout();
@@ -13576,6 +13568,12 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
1357613568
continue;
1357713569
}
1357813570

13571+
// Check that we can merge these candidates without causing a cycle.
13572+
if (!checkMergeStoreCandidatesForDependencies(StoreNodes, NumElem)) {
13573+
StoreNodes.erase(StoreNodes.begin(), StoreNodes.begin() + NumElem);
13574+
continue;
13575+
}
13576+
1357913577
bool Merged = MergeStoresOfConstantsOrVecElts(
1358013578
StoreNodes, MemVT, NumElem, true, UseVector, LastIntegerTrunc);
1358113579
RV |= Merged;
@@ -13634,6 +13632,14 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
1363413632
continue;
1363513633
}
1363613634

13635+
// Check that we can merge these candidates without causing a cycle.
13636+
if (!checkMergeStoreCandidatesForDependencies(StoreNodes,
13637+
NumStoresToMerge)) {
13638+
StoreNodes.erase(StoreNodes.begin(),
13639+
StoreNodes.begin() + NumStoresToMerge);
13640+
continue;
13641+
}
13642+
1363713643
bool Merged = MergeStoresOfConstantsOrVecElts(
1363813644
StoreNodes, MemVT, NumStoresToMerge, false, true, false);
1363913645
if (!Merged) {
@@ -13803,6 +13809,12 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
1380313809
continue;
1380413810
}
1380513811

13812+
// Check that we can merge these candidates without causing a cycle.
13813+
if (!checkMergeStoreCandidatesForDependencies(StoreNodes, NumElem)) {
13814+
StoreNodes.erase(StoreNodes.begin(), StoreNodes.begin() + NumElem);
13815+
continue;
13816+
}
13817+
1380613818
// Find if it is better to use vectors or integers to load and store
1380713819
// to memory.
1380813820
EVT JointMemOpVT;

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