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[RISCV][GISel] Add constant_fold_cast_op to RISCVPostLegalizerCombiner.
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2 files changed

+15
-44
lines changed

2 files changed

+15
-44
lines changed

‎llvm/lib/Target/RISCV/RISCVCombine.td

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,5 +23,6 @@ def RISCVO0PreLegalizerCombiner: GICombiner<
2323
// TODO: Add more combines.
2424
def RISCVPostLegalizerCombiner
2525
: GICombiner<"RISCVPostLegalizerCombinerImpl",
26-
[redundant_and, identity_combines, commute_constant_to_rhs]> {
26+
[redundant_and, identity_combines, commute_constant_to_rhs,
27+
constant_fold_cast_op]> {
2728
}

‎llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll

Lines changed: 13 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,7 @@ define signext i32 @ctlz_i32(i32 signext %a) nounwind {
1111
; RV64I: # %bb.0:
1212
; RV64I-NEXT: slli a1, a0, 32
1313
; RV64I-NEXT: srli a1, a1, 32
14-
; RV64I-NEXT: slli a2, zero, 32
15-
; RV64I-NEXT: srli a2, a2, 32
16-
; RV64I-NEXT: beq a1, a2, .LBB0_2
14+
; RV64I-NEXT: beqz a1, .LBB0_2
1715
; RV64I-NEXT: # %bb.1: # %cond.false
1816
; RV64I-NEXT: addi sp, sp, -16
1917
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
@@ -72,10 +70,8 @@ define signext i32 @log2_i32(i32 signext %a) nounwind {
7270
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
7371
; RV64I-NEXT: slli a1, a0, 32
7472
; RV64I-NEXT: srli a1, a1, 32
75-
; RV64I-NEXT: slli a2, zero, 32
76-
; RV64I-NEXT: srli a2, a2, 32
7773
; RV64I-NEXT: li s0, 31
78-
; RV64I-NEXT: beq a1, a2, .LBB1_2
74+
; RV64I-NEXT: beqz a1, .LBB1_2
7975
; RV64I-NEXT: # %bb.1: # %cond.false
8076
; RV64I-NEXT: srliw a1, a0, 1
8177
; RV64I-NEXT: or a0, a0, a1
@@ -140,10 +136,8 @@ define signext i32 @log2_ceil_i32(i32 signext %a) nounwind {
140136
; RV64I-NEXT: addi a0, a0, -1
141137
; RV64I-NEXT: slli a1, a0, 32
142138
; RV64I-NEXT: srli a2, a1, 32
143-
; RV64I-NEXT: slli a1, zero, 32
144-
; RV64I-NEXT: srli a3, a1, 32
145139
; RV64I-NEXT: li a1, 32
146-
; RV64I-NEXT: beq a2, a3, .LBB2_2
140+
; RV64I-NEXT: beqz a2, .LBB2_2
147141
; RV64I-NEXT: # %bb.1: # %cond.false
148142
; RV64I-NEXT: srliw a1, a0, 1
149143
; RV64I-NEXT: or a0, a0, a1
@@ -237,9 +231,7 @@ define signext i32 @findLastSet_i32(i32 signext %a) nounwind {
237231
; RV64I-NEXT: call __muldi3
238232
; RV64I-NEXT: slli s1, s1, 32
239233
; RV64I-NEXT: srli s1, s1, 32
240-
; RV64I-NEXT: slli a1, zero, 32
241-
; RV64I-NEXT: srli a1, a1, 32
242-
; RV64I-NEXT: beq s1, a1, .LBB3_2
234+
; RV64I-NEXT: beqz s1, .LBB3_2
243235
; RV64I-NEXT: # %bb.1:
244236
; RV64I-NEXT: srliw a0, a0, 24
245237
; RV64I-NEXT: li a1, 32
@@ -257,10 +249,8 @@ define signext i32 @findLastSet_i32(i32 signext %a) nounwind {
257249
; RV64ZBB: # %bb.0:
258250
; RV64ZBB-NEXT: slli a1, a0, 32
259251
; RV64ZBB-NEXT: srli a2, a1, 32
260-
; RV64ZBB-NEXT: slli a1, zero, 32
261-
; RV64ZBB-NEXT: srli a3, a1, 32
262252
; RV64ZBB-NEXT: li a1, -1
263-
; RV64ZBB-NEXT: beq a2, a3, .LBB3_2
253+
; RV64ZBB-NEXT: beqz a2, .LBB3_2
264254
; RV64ZBB-NEXT: # %bb.1:
265255
; RV64ZBB-NEXT: clzw a0, a0
266256
; RV64ZBB-NEXT: xori a1, a0, 31
@@ -280,9 +270,7 @@ define i32 @ctlz_lshr_i32(i32 signext %a) {
280270
; RV64I-NEXT: srliw a0, a0, 1
281271
; RV64I-NEXT: slli a1, a0, 32
282272
; RV64I-NEXT: srli a1, a1, 32
283-
; RV64I-NEXT: slli a2, zero, 32
284-
; RV64I-NEXT: srli a2, a2, 32
285-
; RV64I-NEXT: beq a1, a2, .LBB4_2
273+
; RV64I-NEXT: beqz a1, .LBB4_2
286274
; RV64I-NEXT: # %bb.1: # %cond.false
287275
; RV64I-NEXT: addi sp, sp, -16
288276
; RV64I-NEXT: .cfi_def_cfa_offset 16
@@ -421,9 +409,7 @@ define signext i32 @cttz_i32(i32 signext %a) nounwind {
421409
; RV64I: # %bb.0:
422410
; RV64I-NEXT: slli a1, a0, 32
423411
; RV64I-NEXT: srli a1, a1, 32
424-
; RV64I-NEXT: slli a2, zero, 32
425-
; RV64I-NEXT: srli a2, a2, 32
426-
; RV64I-NEXT: beq a1, a2, .LBB6_2
412+
; RV64I-NEXT: beqz a1, .LBB6_2
427413
; RV64I-NEXT: # %bb.1: # %cond.false
428414
; RV64I-NEXT: addi sp, sp, -16
429415
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
@@ -538,9 +524,7 @@ define signext i32 @findFirstSet_i32(i32 signext %a) nounwind {
538524
; RV64I-NEXT: call __muldi3
539525
; RV64I-NEXT: slli s1, s1, 32
540526
; RV64I-NEXT: srli s1, s1, 32
541-
; RV64I-NEXT: slli a1, zero, 32
542-
; RV64I-NEXT: srli a1, a1, 32
543-
; RV64I-NEXT: beq s1, a1, .LBB8_2
527+
; RV64I-NEXT: beqz s1, .LBB8_2
544528
; RV64I-NEXT: # %bb.1:
545529
; RV64I-NEXT: srliw s0, a0, 24
546530
; RV64I-NEXT: .LBB8_2:
@@ -555,10 +539,8 @@ define signext i32 @findFirstSet_i32(i32 signext %a) nounwind {
555539
; RV64ZBB: # %bb.0:
556540
; RV64ZBB-NEXT: slli a1, a0, 32
557541
; RV64ZBB-NEXT: srli a2, a1, 32
558-
; RV64ZBB-NEXT: slli a1, zero, 32
559-
; RV64ZBB-NEXT: srli a3, a1, 32
560542
; RV64ZBB-NEXT: li a1, -1
561-
; RV64ZBB-NEXT: beq a2, a3, .LBB8_2
543+
; RV64ZBB-NEXT: beqz a2, .LBB8_2
562544
; RV64ZBB-NEXT: # %bb.1:
563545
; RV64ZBB-NEXT: ctzw a1, a0
564546
; RV64ZBB-NEXT: .LBB8_2:
@@ -601,11 +583,9 @@ define signext i32 @ffs_i32(i32 signext %a) nounwind {
601583
; RV64I-NEXT: call __muldi3
602584
; RV64I-NEXT: slli s0, s0, 32
603585
; RV64I-NEXT: srli s0, s0, 32
604-
; RV64I-NEXT: slli a1, zero, 32
605-
; RV64I-NEXT: srli a2, a1, 32
606586
; RV64I-NEXT: mv a1, a0
607587
; RV64I-NEXT: li a0, 0
608-
; RV64I-NEXT: beq s0, a2, .LBB9_2
588+
; RV64I-NEXT: beqz s0, .LBB9_2
609589
; RV64I-NEXT: # %bb.1:
610590
; RV64I-NEXT: srliw a0, a1, 24
611591
; RV64I-NEXT: addiw a0, a0, 1
@@ -619,10 +599,8 @@ define signext i32 @ffs_i32(i32 signext %a) nounwind {
619599
; RV64ZBB: # %bb.0:
620600
; RV64ZBB-NEXT: slli a1, a0, 32
621601
; RV64ZBB-NEXT: srli a2, a1, 32
622-
; RV64ZBB-NEXT: slli a1, zero, 32
623-
; RV64ZBB-NEXT: srli a3, a1, 32
624602
; RV64ZBB-NEXT: li a1, 0
625-
; RV64ZBB-NEXT: beq a2, a3, .LBB9_2
603+
; RV64ZBB-NEXT: beqz a2, .LBB9_2
626604
; RV64ZBB-NEXT: # %bb.1:
627605
; RV64ZBB-NEXT: ctzw a1, a0
628606
; RV64ZBB-NEXT: addiw a1, a1, 1
@@ -744,8 +722,6 @@ define i1 @ctpop_i32_ult_two(i32 signext %a) nounwind {
744722
; RV64I: # %bb.0:
745723
; RV64I-NEXT: addi sp, sp, -16
746724
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
747-
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
748-
; RV64I-NEXT: li s0, 2
749725
; RV64I-NEXT: srliw a1, a0, 1
750726
; RV64I-NEXT: lui a2, 349525
751727
; RV64I-NEXT: addi a2, a2, 1365
@@ -768,23 +744,17 @@ define i1 @ctpop_i32_ult_two(i32 signext %a) nounwind {
768744
; RV64I-NEXT: srliw a0, a0, 24
769745
; RV64I-NEXT: slli a0, a0, 32
770746
; RV64I-NEXT: srli a0, a0, 32
771-
; RV64I-NEXT: slli s0, s0, 32
772-
; RV64I-NEXT: srli s0, s0, 32
773-
; RV64I-NEXT: sltu a0, a0, s0
747+
; RV64I-NEXT: sltiu a0, a0, 2
774748
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
775-
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
776749
; RV64I-NEXT: addi sp, sp, 16
777750
; RV64I-NEXT: ret
778751
;
779752
; RV64ZBB-LABEL: ctpop_i32_ult_two:
780753
; RV64ZBB: # %bb.0:
781-
; RV64ZBB-NEXT: li a1, 2
782754
; RV64ZBB-NEXT: cpopw a0, a0
783755
; RV64ZBB-NEXT: slli a0, a0, 32
784756
; RV64ZBB-NEXT: srli a0, a0, 32
785-
; RV64ZBB-NEXT: slli a1, a1, 32
786-
; RV64ZBB-NEXT: srli a1, a1, 32
787-
; RV64ZBB-NEXT: sltu a0, a0, a1
757+
; RV64ZBB-NEXT: sltiu a0, a0, 2
788758
; RV64ZBB-NEXT: ret
789759
%1 = call i32 @llvm.ctpop.i32(i32 %a)
790760
%2 = icmp ult i32 %1, 2

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