@@ -632,3 +632,81 @@ entry:
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%div = sdiv exact i64 %x , %y
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ret i64 %div
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}
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+
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+ define void @sdiv_zero (ptr %p , i32 %arg ) {
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+ ; CHECK-LABEL: @sdiv_zero(
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG:%.*]], 5
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+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 11
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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+ ; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
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+ ; CHECK-NEXT: [[DIV1:%.*]] = sdiv i8 [[DIV_LHS_TRUNC]], 6
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+ ; CHECK-NEXT: [[DIV_SEXT:%.*]] = sext i8 [[DIV1]] to i32
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+ ; CHECK-NEXT: store i32 [[DIV_SEXT]], ptr [[P:%.*]], align 4
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+ ; CHECK-NEXT: ret void
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+ ;
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+ %add = add i32 %arg , 5
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+ %cmp = icmp ult i32 %add , 11
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+ call void @llvm.assume (i1 %cmp )
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+ %div = sdiv i32 %arg , 6
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+ store i32 %div , ptr %p
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+ ret void
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+ }
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+
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+ define void @sdiv_not_zero (ptr %p , i32 %arg ) {
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+ ; CHECK-LABEL: @sdiv_not_zero(
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG:%.*]], 5
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+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 12
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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+ ; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
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+ ; CHECK-NEXT: [[DIV1:%.*]] = sdiv i8 [[DIV_LHS_TRUNC]], 6
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+ ; CHECK-NEXT: [[DIV_SEXT:%.*]] = sext i8 [[DIV1]] to i32
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+ ; CHECK-NEXT: store i32 [[DIV_SEXT]], ptr [[P:%.*]], align 4
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+ ; CHECK-NEXT: ret void
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+ ;
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+ %add = add i32 %arg , 5
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+ %cmp = icmp ult i32 %add , 12
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+ call void @llvm.assume (i1 %cmp )
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+ %div = sdiv i32 %arg , 6
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+ store i32 %div , ptr %p
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+ ret void
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+ }
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+
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+ define void @sdiv_pos (ptr %p , i32 %arg ) {
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+ ; CHECK-LABEL: @sdiv_pos(
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG:%.*]], -12
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+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 6
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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+ ; CHECK-NEXT: [[DIV1_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
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+ ; CHECK-NEXT: [[DIV12:%.*]] = udiv i8 [[DIV1_LHS_TRUNC]], 6
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+ ; CHECK-NEXT: [[DIV1_ZEXT:%.*]] = zext i8 [[DIV12]] to i32
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+ ; CHECK-NEXT: store i32 [[DIV1_ZEXT]], ptr [[P:%.*]], align 4
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+ ; CHECK-NEXT: ret void
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+ ;
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+ %add = add i32 %arg , -12
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+ %cmp = icmp ult i32 %add , 6
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+ call void @llvm.assume (i1 %cmp )
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+ %div = sdiv i32 %arg , 6
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+ store i32 %div , ptr %p
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+ ret void
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+ }
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+
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+ define void @sdiv_neg (ptr %p , i32 %arg ) {
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+ ; CHECK-LABEL: @sdiv_neg(
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG:%.*]], 17
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+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 6
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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+ ; CHECK-NEXT: [[ARG_NONNEG:%.*]] = sub i32 0, [[ARG]]
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+ ; CHECK-NEXT: [[DIV1_LHS_TRUNC:%.*]] = trunc i32 [[ARG_NONNEG]] to i8
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+ ; CHECK-NEXT: [[DIV12:%.*]] = udiv i8 [[DIV1_LHS_TRUNC]], 6
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+ ; CHECK-NEXT: [[DIV1_ZEXT:%.*]] = zext i8 [[DIV12]] to i32
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+ ; CHECK-NEXT: [[DIV1_NEG:%.*]] = sub i32 0, [[DIV1_ZEXT]]
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+ ; CHECK-NEXT: store i32 [[DIV1_NEG]], ptr [[P:%.*]], align 4
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+ ; CHECK-NEXT: ret void
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+ ;
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+ %add = add i32 %arg , 17
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+ %cmp = icmp ult i32 %add , 6
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+ call void @llvm.assume (i1 %cmp )
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+ %div = sdiv i32 %arg , 6
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+ store i32 %div , ptr %p
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+ ret void
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+ }
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