AArch64: move Apple codename CPUs to be based on the OSS numbered definitions.

Author: TNorthover

llvm/lib/Target/AArch64/AArch64.td

@@ -582,43 +582,6 @@ def ProcAppleA7 : SubtargetFeature<"apple-a7", "ARMProcFamily", "AppleA7",
                                    FeatureZCZeroingFPWorkaround
                                    ]>;
 
-def ProcVortex : SubtargetFeature<"vortex", "ARMProcFamily", "Vortex",
-                                   "Vortex", [
-                                   FeatureAlternateSExtLoadCVTF32Pattern,
-                                   FeatureArithmeticBccFusion,
-                                   FeatureArithmeticCbzFusion,
-                                   FeatureCrypto,
-                                   FeatureDisableLatencySchedHeuristic,
-                                   FeatureFullFP16,
-                                   FeatureFuseAES,
-                                   FeatureFuseCryptoEOR,
-                                   FeatureNEON,
-                                   FeaturePerfMon,
-                                   FeatureZCRegMove,
-                                   FeatureZCZeroing,
-                                   HasV8_3aOps
-                                   ]>;
-
-def ProcLightning : SubtargetFeature<"lightning", "ARMProcFamily", "Lightning",
-                                     "Lightning", [
-                                     FeatureAlternateSExtLoadCVTF32Pattern,
-                                     FeatureArithmeticBccFusion,
-                                     FeatureArithmeticCbzFusion,
-                                     FeatureCrypto,
-                                     FeatureDisableLatencySchedHeuristic,
-                                     FeatureFP16FML,
-                                     FeatureFullFP16,
-                                     FeatureFuseAES,
-                                     FeatureFuseCryptoEOR,
-                                     FeatureNEON,
-                                     FeaturePerfMon,
-                                     FeatureSHA3,
-                                     FeatureSM4,
-                                     FeatureZCRegMove,
-                                     FeatureZCZeroing,
-                                     HasV8_4aOps
-                                     ]>;
-
 def ProcAppleA10 : SubtargetFeature<"apple-a10", "ARMProcFamily", "AppleA10",
                                     "Apple A10", [
                                     FeatureAlternateSExtLoadCVTF32Pattern,
@@ -918,10 +881,10 @@ def : ProcessorModel<"thunderx2t99", ThunderX2T99Model, [ProcThunderX2T99]>;
 // FIXME: HiSilicon TSV110 is currently modeled as a Cortex-A57.
 def : ProcessorModel<"tsv110", CortexA57Model, [ProcTSV110]>;
 
-// Support cyclone as an alias for apple-a7 so we can still LTO old bitcode.
+// Support some CPU codenames as aliases for apple-aN so we can still LTO old bitcode.
 def : ProcessorModel<"cyclone", CycloneModel, [ProcAppleA7]>;
-def : ProcessorModel<"vortex", CycloneModel, [ProcVortex]>;
-def : ProcessorModel<"lightning", CycloneModel, [ProcLightning]>;
+def : ProcessorModel<"vortex", CycloneModel, [ProcAppleA12]>;
+def : ProcessorModel<"lightning", CycloneModel, [ProcAppleA13]>;
 
 // iPhone and iPad CPUs
 def : ProcessorModel<"apple-a7", CycloneModel, [ProcAppleA7]>;

llvm/lib/Target/AArch64/AArch64Subtarget.cpp

@@ -88,8 +88,6 @@ void AArch64Subtarget::initializeProperties() {
   case CortexA76:
     PrefFunctionLogAlignment = 4;
     break;
-  case Vortex:
-  case Lightning:
   case AppleA7:
   case AppleA10:
   case AppleA11:

llvm/lib/Target/AArch64/AArch64Subtarget.h

@@ -55,7 +55,6 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
     ExynosM3,
     Falkor,
     Kryo,
-    Lightning,
     NeoverseE1,
     NeoverseN1,
     Saphira,
@@ -65,7 +64,6 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
     ThunderXT83,
     ThunderXT88,
     TSV110,
-    Vortex
   };
 
 protected: