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[InstCombine] Add additional trunc(shl(x,c)) -> shl(trunc(x),trunc(c)) vector tests
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  • llvm/test/Transforms/InstCombine

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llvm/test/Transforms/InstCombine/trunc.ll

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@@ -755,6 +755,50 @@ define i32 @trunc_shl_lshr_infloop(i64 %arg) {
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ret i32 %C
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}
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define <2 x i32> @trunc_shl_v2i32_v2i64_uniform(<2 x i64> %val) {
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; CHECK-LABEL: @trunc_shl_v2i32_v2i64_uniform(
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 31>
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%shl = shl <2 x i64> %val, <i64 31, i64 31>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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define <2 x i32> @trunc_shl_v2i32_v2i64_undef(<2 x i64> %val) {
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; CHECK-LABEL: @trunc_shl_v2i32_v2i64_undef(
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 undef>
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%shl = shl <2 x i64> %val, <i64 31, i64 undef>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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define <2 x i32> @trunc_shl_v2i32_v2i64_nonuniform(<2 x i64> %val) {
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; CHECK-LABEL: @trunc_shl_v2i32_v2i64_nonuniform(
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 12>
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%shl = shl <2 x i64> %val, <i64 31, i64 12>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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define <2 x i32> @trunc_shl_v2i32_v2i64_outofrange(<2 x i64> %val) {
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; CHECK-LABEL: @trunc_shl_v2i32_v2i64_outofrange(
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 33>
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%shl = shl <2 x i64> %val, <i64 31, i64 33>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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define i32 @trunc_shl_ashr_infloop(i64 %arg) {
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; CHECK-LABEL: @trunc_shl_ashr_infloop(
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; CHECK-NEXT: [[A:%.*]] = ashr i64 [[ARG:%.*]], 3

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