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[NFC][MC] Use MCRegister for ReachingDefAnalysis APIs
Also updated the users of the APIs; and a drive-by small change to RDFRegister.cpp Differential Revision: https://reviews.llvm.org/D89912
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-78
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5 files changed

+94
-78
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llvm/include/llvm/CodeGen/ReachingDefAnalysis.h

Lines changed: 23 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -139,23 +139,25 @@ class ReachingDefAnalysis : public MachineFunctionPass {
139139

140140
/// Provides the instruction id of the closest reaching def instruction of
141141
/// PhysReg that reaches MI, relative to the begining of MI's basic block.
142-
int getReachingDef(MachineInstr *MI, int PhysReg) const;
142+
int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
143143

144144
/// Return whether A and B use the same def of PhysReg.
145-
bool hasSameReachingDef(MachineInstr *A, MachineInstr *B, int PhysReg) const;
145+
bool hasSameReachingDef(MachineInstr *A, MachineInstr *B,
146+
MCRegister PhysReg) const;
146147

147148
/// Return whether the reaching def for MI also is live out of its parent
148149
/// block.
149-
bool isReachingDefLiveOut(MachineInstr *MI, int PhysReg) const;
150+
bool isReachingDefLiveOut(MachineInstr *MI, MCRegister PhysReg) const;
150151

151152
/// Return the local MI that produces the live out value for PhysReg, or
152153
/// nullptr for a non-live out or non-local def.
153154
MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB,
154-
int PhysReg) const;
155+
MCRegister PhysReg) const;
155156

156157
/// If a single MachineInstr creates the reaching definition, then return it.
157158
/// Otherwise return null.
158-
MachineInstr *getUniqueReachingMIDef(MachineInstr *MI, int PhysReg) const;
159+
MachineInstr *getUniqueReachingMIDef(MachineInstr *MI,
160+
MCRegister PhysReg) const;
159161

160162
/// If a single MachineInstr creates the reaching definition, for MIs operand
161163
/// at Idx, then return it. Otherwise return null.
@@ -167,44 +169,44 @@ class ReachingDefAnalysis : public MachineFunctionPass {
167169

168170
/// Provide whether the register has been defined in the same basic block as,
169171
/// and before, MI.
170-
bool hasLocalDefBefore(MachineInstr *MI, int PhysReg) const;
172+
bool hasLocalDefBefore(MachineInstr *MI, MCRegister PhysReg) const;
171173

172174
/// Return whether the given register is used after MI, whether it's a local
173175
/// use or a live out.
174-
bool isRegUsedAfter(MachineInstr *MI, int PhysReg) const;
176+
bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
175177

176178
/// Return whether the given register is defined after MI.
177-
bool isRegDefinedAfter(MachineInstr *MI, int PhysReg) const;
179+
bool isRegDefinedAfter(MachineInstr *MI, MCRegister PhysReg) const;
178180

179181
/// Provides the clearance - the number of instructions since the closest
180182
/// reaching def instuction of PhysReg that reaches MI.
181-
int getClearance(MachineInstr *MI, MCPhysReg PhysReg) const;
183+
int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
182184

183185
/// Provides the uses, in the same block as MI, of register that MI defines.
184186
/// This does not consider live-outs.
185-
void getReachingLocalUses(MachineInstr *MI, int PhysReg,
187+
void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
186188
InstSet &Uses) const;
187189

188190
/// Search MBB for a definition of PhysReg and insert it into Defs. If no
189191
/// definition is found, recursively search the predecessor blocks for them.
190-
void getLiveOuts(MachineBasicBlock *MBB, int PhysReg, InstSet &Defs,
192+
void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg, InstSet &Defs,
191193
BlockSet &VisitedBBs) const;
192-
void getLiveOuts(MachineBasicBlock *MBB, int PhysReg, InstSet &Defs) const;
194+
void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg,
195+
InstSet &Defs) const;
193196

194197
/// For the given block, collect the instructions that use the live-in
195198
/// value of the provided register. Return whether the value is still
196199
/// live on exit.
197-
bool getLiveInUses(MachineBasicBlock *MBB, int PhysReg,
200+
bool getLiveInUses(MachineBasicBlock *MBB, MCRegister PhysReg,
198201
InstSet &Uses) const;
199202

200203
/// Collect the users of the value stored in PhysReg, which is defined
201204
/// by MI.
202-
void getGlobalUses(MachineInstr *MI, int PhysReg,
203-
InstSet &Uses) const;
205+
void getGlobalUses(MachineInstr *MI, MCRegister PhysReg, InstSet &Uses) const;
204206

205207
/// Collect all possible definitions of the value stored in PhysReg, which is
206208
/// used by MI.
207-
void getGlobalReachingDefs(MachineInstr *MI, int PhysReg,
209+
void getGlobalReachingDefs(MachineInstr *MI, MCRegister PhysReg,
208210
InstSet &Defs) const;
209211

210212
/// Return whether From can be moved forwards to just before To.
@@ -229,12 +231,13 @@ class ReachingDefAnalysis : public MachineFunctionPass {
229231

230232
/// Return whether a MachineInstr could be inserted at MI and safely define
231233
/// the given register without affecting the program.
232-
bool isSafeToDefRegAt(MachineInstr *MI, int PhysReg) const;
234+
bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg) const;
233235

234236
/// Return whether a MachineInstr could be inserted at MI and safely define
235237
/// the given register without affecting the program, ignoring any effects
236238
/// on the provided instructions.
237-
bool isSafeToDefRegAt(MachineInstr *MI, int PhysReg, InstSet &Ignore) const;
239+
bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
240+
InstSet &Ignore) const;
238241

239242
private:
240243
/// Set up LiveRegs by merging predecessor live-out values.
@@ -269,7 +272,8 @@ class ReachingDefAnalysis : public MachineFunctionPass {
269272

270273
/// Provides the instruction of the closest reaching def instruction of
271274
/// PhysReg that reaches MI, relative to the begining of MI's basic block.
272-
MachineInstr *getReachingLocalMIDef(MachineInstr *MI, int PhysReg) const;
275+
MachineInstr *getReachingLocalMIDef(MachineInstr *MI,
276+
MCRegister PhysReg) const;
273277
};
274278

275279
} // namespace llvm

llvm/lib/CodeGen/BreakFalseDeps.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -171,8 +171,8 @@ bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx,
171171

172172
bool BreakFalseDeps::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx,
173173
unsigned Pref) {
174-
Register reg = MI->getOperand(OpIdx).getReg();
175-
unsigned Clearance = RDA->getClearance(MI, reg);
174+
MCRegister Reg = MI->getOperand(OpIdx).getReg().asMCReg();
175+
unsigned Clearance = RDA->getClearance(MI, Reg);
176176
LLVM_DEBUG(dbgs() << "Clearance: " << Clearance << ", want " << Pref);
177177

178178
if (Pref > Clearance) {

llvm/lib/CodeGen/RDFRegisters.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -84,10 +84,10 @@ PhysicalRegisterInfo::PhysicalRegisterInfo(const TargetRegisterInfo &tri,
8484
for (uint32_t M = 1, NM = RegMasks.size(); M <= NM; ++M) {
8585
BitVector PU(TRI.getNumRegUnits());
8686
const uint32_t *MB = RegMasks.get(M);
87-
for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) {
88-
if (!(MB[i/32] & (1u << (i%32))))
87+
for (unsigned I = 1, E = TRI.getNumRegs(); I != E; ++I) {
88+
if (!(MB[I / 32] & (1u << (I % 32))))
8989
continue;
90-
for (MCRegUnitIterator U(i, &TRI); U.isValid(); ++U)
90+
for (MCRegUnitIterator U(MCRegister::from(I), &TRI); U.isValid(); ++U)
9191
PU.set(*U);
9292
}
9393
MaskInfos[M].Units = PU.flip();

llvm/lib/CodeGen/ReachingDefAnalysis.cpp

Lines changed: 43 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -29,15 +29,15 @@ static bool isValidRegUse(const MachineOperand &MO) {
2929
return isValidReg(MO) && MO.isUse();
3030
}
3131

32-
static bool isValidRegUseOf(const MachineOperand &MO, int PhysReg) {
32+
static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg) {
3333
return isValidRegUse(MO) && MO.getReg() == PhysReg;
3434
}
3535

3636
static bool isValidRegDef(const MachineOperand &MO) {
3737
return isValidReg(MO) && MO.isDef();
3838
}
3939

40-
static bool isValidRegDefOf(const MachineOperand &MO, int PhysReg) {
40+
static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg) {
4141
return isValidRegDef(MO) && MO.getReg() == PhysReg;
4242
}
4343

@@ -121,7 +121,8 @@ void ReachingDefAnalysis::processDefs(MachineInstr *MI) {
121121
for (auto &MO : MI->operands()) {
122122
if (!isValidRegDef(MO))
123123
continue;
124-
for (MCRegUnitIterator Unit(MO.getReg(), TRI); Unit.isValid(); ++Unit) {
124+
for (MCRegUnitIterator Unit(MO.getReg().asMCReg(), TRI); Unit.isValid();
125+
++Unit) {
125126
// This instruction explicitly defines the current reg unit.
126127
LLVM_DEBUG(dbgs() << printReg(*Unit, TRI) << ":\t" << CurInstr
127128
<< '\t' << *MI);
@@ -252,7 +253,8 @@ void ReachingDefAnalysis::traverse() {
252253
#endif
253254
}
254255

255-
int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) const {
256+
int ReachingDefAnalysis::getReachingDef(MachineInstr *MI,
257+
MCRegister PhysReg) const {
256258
assert(InstIds.count(MI) && "Unexpected machine instuction.");
257259
int InstId = InstIds.lookup(MI);
258260
int DefRes = ReachingDefDefaultVal;
@@ -271,15 +273,16 @@ int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) const {
271273
return LatestDef;
272274
}
273275

274-
MachineInstr* ReachingDefAnalysis::getReachingLocalMIDef(MachineInstr *MI,
275-
int PhysReg) const {
276+
MachineInstr *
277+
ReachingDefAnalysis::getReachingLocalMIDef(MachineInstr *MI,
278+
MCRegister PhysReg) const {
276279
return hasLocalDefBefore(MI, PhysReg)
277280
? getInstFromId(MI->getParent(), getReachingDef(MI, PhysReg))
278281
: nullptr;
279282
}
280283

281284
bool ReachingDefAnalysis::hasSameReachingDef(MachineInstr *A, MachineInstr *B,
282-
int PhysReg) const {
285+
MCRegister PhysReg) const {
283286
MachineBasicBlock *ParentA = A->getParent();
284287
MachineBasicBlock *ParentB = B->getParent();
285288
if (ParentA != ParentB)
@@ -307,18 +310,19 @@ MachineInstr *ReachingDefAnalysis::getInstFromId(MachineBasicBlock *MBB,
307310
return nullptr;
308311
}
309312

310-
int
311-
ReachingDefAnalysis::getClearance(MachineInstr *MI, MCPhysReg PhysReg) const {
313+
int ReachingDefAnalysis::getClearance(MachineInstr *MI,
314+
MCRegister PhysReg) const {
312315
assert(InstIds.count(MI) && "Unexpected machine instuction.");
313316
return InstIds.lookup(MI) - getReachingDef(MI, PhysReg);
314317
}
315318

316-
bool
317-
ReachingDefAnalysis::hasLocalDefBefore(MachineInstr *MI, int PhysReg) const {
319+
bool ReachingDefAnalysis::hasLocalDefBefore(MachineInstr *MI,
320+
MCRegister PhysReg) const {
318321
return getReachingDef(MI, PhysReg) >= 0;
319322
}
320323

321-
void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, int PhysReg,
324+
void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def,
325+
MCRegister PhysReg,
322326
InstSet &Uses) const {
323327
MachineBasicBlock *MBB = Def->getParent();
324328
MachineBasicBlock::iterator MI = MachineBasicBlock::iterator(Def);
@@ -342,9 +346,9 @@ void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, int PhysReg,
342346
}
343347
}
344348

345-
bool
346-
ReachingDefAnalysis::getLiveInUses(MachineBasicBlock *MBB, int PhysReg,
347-
InstSet &Uses) const {
349+
bool ReachingDefAnalysis::getLiveInUses(MachineBasicBlock *MBB,
350+
MCRegister PhysReg,
351+
InstSet &Uses) const {
348352
for (MachineInstr &MI :
349353
instructionsWithoutDebug(MBB->instr_begin(), MBB->instr_end())) {
350354
for (auto &MO : MI.operands()) {
@@ -361,9 +365,8 @@ ReachingDefAnalysis::getLiveInUses(MachineBasicBlock *MBB, int PhysReg,
361365
return isReachingDefLiveOut(&*Last, PhysReg);
362366
}
363367

364-
void
365-
ReachingDefAnalysis::getGlobalUses(MachineInstr *MI, int PhysReg,
366-
InstSet &Uses) const {
368+
void ReachingDefAnalysis::getGlobalUses(MachineInstr *MI, MCRegister PhysReg,
369+
InstSet &Uses) const {
367370
MachineBasicBlock *MBB = MI->getParent();
368371

369372
// Collect the uses that each def touches within the block.
@@ -391,9 +394,9 @@ ReachingDefAnalysis::getGlobalUses(MachineInstr *MI, int PhysReg,
391394
}
392395
}
393396

394-
void
395-
ReachingDefAnalysis::getGlobalReachingDefs(MachineInstr *MI, int PhysReg,
396-
InstSet &Defs) const {
397+
void ReachingDefAnalysis::getGlobalReachingDefs(MachineInstr *MI,
398+
MCRegister PhysReg,
399+
InstSet &Defs) const {
397400
if (auto *Def = getUniqueReachingMIDef(MI, PhysReg)) {
398401
Defs.insert(Def);
399402
return;
@@ -403,15 +406,15 @@ ReachingDefAnalysis::getGlobalReachingDefs(MachineInstr *MI, int PhysReg,
403406
getLiveOuts(MBB, PhysReg, Defs);
404407
}
405408

406-
void ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB, int PhysReg,
407-
InstSet &Defs) const {
409+
void ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB,
410+
MCRegister PhysReg, InstSet &Defs) const {
408411
SmallPtrSet<MachineBasicBlock*, 2> VisitedBBs;
409412
getLiveOuts(MBB, PhysReg, Defs, VisitedBBs);
410413
}
411414

412-
void
413-
ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB, int PhysReg,
414-
InstSet &Defs, BlockSet &VisitedBBs) const {
415+
void ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB,
416+
MCRegister PhysReg, InstSet &Defs,
417+
BlockSet &VisitedBBs) const {
415418
if (VisitedBBs.count(MBB))
416419
return;
417420

@@ -428,8 +431,9 @@ ReachingDefAnalysis::getLiveOuts(MachineBasicBlock *MBB, int PhysReg,
428431
getLiveOuts(Pred, PhysReg, Defs, VisitedBBs);
429432
}
430433

431-
MachineInstr *ReachingDefAnalysis::getUniqueReachingMIDef(MachineInstr *MI,
432-
int PhysReg) const {
434+
MachineInstr *
435+
ReachingDefAnalysis::getUniqueReachingMIDef(MachineInstr *MI,
436+
MCRegister PhysReg) const {
433437
// If there's a local def before MI, return it.
434438
MachineInstr *LocalDef = getReachingLocalMIDef(MI, PhysReg);
435439
if (LocalDef && InstIds.lookup(LocalDef) < InstIds.lookup(MI))
@@ -460,7 +464,8 @@ MachineInstr *ReachingDefAnalysis::getMIOperand(MachineInstr *MI,
460464
return getUniqueReachingMIDef(MI, MO.getReg());
461465
}
462466

463-
bool ReachingDefAnalysis::isRegUsedAfter(MachineInstr *MI, int PhysReg) const {
467+
bool ReachingDefAnalysis::isRegUsedAfter(MachineInstr *MI,
468+
MCRegister PhysReg) const {
464469
MachineBasicBlock *MBB = MI->getParent();
465470
LivePhysRegs LiveRegs(*TRI);
466471
LiveRegs.addLiveOuts(*MBB);
@@ -481,7 +486,7 @@ bool ReachingDefAnalysis::isRegUsedAfter(MachineInstr *MI, int PhysReg) const {
481486
}
482487

483488
bool ReachingDefAnalysis::isRegDefinedAfter(MachineInstr *MI,
484-
int PhysReg) const {
489+
MCRegister PhysReg) const {
485490
MachineBasicBlock *MBB = MI->getParent();
486491
auto Last = MBB->getLastNonDebugInstr();
487492
if (Last != MBB->end() &&
@@ -494,8 +499,8 @@ bool ReachingDefAnalysis::isRegDefinedAfter(MachineInstr *MI,
494499
return false;
495500
}
496501

497-
bool
498-
ReachingDefAnalysis::isReachingDefLiveOut(MachineInstr *MI, int PhysReg) const {
502+
bool ReachingDefAnalysis::isReachingDefLiveOut(MachineInstr *MI,
503+
MCRegister PhysReg) const {
499504
MachineBasicBlock *MBB = MI->getParent();
500505
LivePhysRegs LiveRegs(*TRI);
501506
LiveRegs.addLiveOuts(*MBB);
@@ -515,8 +520,9 @@ ReachingDefAnalysis::isReachingDefLiveOut(MachineInstr *MI, int PhysReg) const {
515520
return true;
516521
}
517522

518-
MachineInstr* ReachingDefAnalysis::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
519-
int PhysReg) const {
523+
MachineInstr *
524+
ReachingDefAnalysis::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
525+
MCRegister PhysReg) const {
520526
LivePhysRegs LiveRegs(*TRI);
521527
LiveRegs.addLiveOuts(*MBB);
522528
if (!LiveRegs.contains(PhysReg))
@@ -640,7 +646,7 @@ ReachingDefAnalysis::isSafeToRemove(MachineInstr *MI, InstSet &Visited,
640646
void ReachingDefAnalysis::collectKilledOperands(MachineInstr *MI,
641647
InstSet &Dead) const {
642648
Dead.insert(MI);
643-
auto IsDead = [this, &Dead](MachineInstr *Def, int PhysReg) {
649+
auto IsDead = [this, &Dead](MachineInstr *Def, MCRegister PhysReg) {
644650
if (mayHaveSideEffects(*Def))
645651
return false;
646652

@@ -673,12 +679,12 @@ void ReachingDefAnalysis::collectKilledOperands(MachineInstr *MI,
673679
}
674680

675681
bool ReachingDefAnalysis::isSafeToDefRegAt(MachineInstr *MI,
676-
int PhysReg) const {
682+
MCRegister PhysReg) const {
677683
SmallPtrSet<MachineInstr*, 1> Ignore;
678684
return isSafeToDefRegAt(MI, PhysReg, Ignore);
679685
}
680686

681-
bool ReachingDefAnalysis::isSafeToDefRegAt(MachineInstr *MI, int PhysReg,
687+
bool ReachingDefAnalysis::isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
682688
InstSet &Ignore) const {
683689
// Check for any uses of the register after MI.
684690
if (isRegUsedAfter(MI, PhysReg)) {

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