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[GVN] Add additional tests after 216d1a7.
Further extend test coverage added in 216d1a7 (cherry-picked from b1fb613)
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‎llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll

Lines changed: 260 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -382,6 +382,266 @@ exit:
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ret i32 %res.2
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}
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define i32 @test_pointer_phi_select_simp_store_clobber_7(i32* %a, i32* %b, i32* %c, i1 %cond) {
386+
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_7(
387+
; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
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; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
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; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[A]], align 4
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
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; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
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; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
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; CHECK-NEXT: ret i32 [[RES_2]]
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;
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entry:
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br i1 %cond, label %then, label %else
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then:
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%l.1 = load i32, i32* %a, align 4
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%l.2 = load i32, i32* %b, align 4
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store i32 99, i32* %c
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%cmp.i.i.i = icmp ult i32 %l.1, %l.2
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%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
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%res.0 = load i32, i32* %a, align 4
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br label %exit
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else:
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br label %exit
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exit:
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%p = phi i32* [ %min.select, %then ], [ %a, %else ]
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%v = phi i32 [ %res.0, %then ], [ 10, %else ]
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%res.2 = load i32, i32* %p, align 4
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%add = add i32 %res.2, %v
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ret i32 %res.2
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}
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define i32 @test_pointer_phi_select_simp_store_clobber_8(i32* %a, i32* %b, i32* %c, i1 %cond) {
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; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_8(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
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; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
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; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[B]], align 4
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
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; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
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; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
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; CHECK-NEXT: ret i32 [[RES_2]]
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;
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entry:
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br i1 %cond, label %then, label %else
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then:
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%l.1 = load i32, i32* %a, align 4
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%l.2 = load i32, i32* %b, align 4
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store i32 99, i32* %c
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%cmp.i.i.i = icmp ult i32 %l.1, %l.2
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%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
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%res.0 = load i32, i32* %b, align 4
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br label %exit
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else:
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br label %exit
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exit:
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%p = phi i32* [ %min.select, %then ], [ %a, %else ]
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%v = phi i32 [ %res.0, %then ], [ 10, %else ]
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%res.2 = load i32, i32* %p, align 4
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%add = add i32 %res.2, %v
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ret i32 %res.2
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}
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define i32 @test_pointer_phi_select_simp_store_clobber_9(i32* %a, i32* %b, i1 %cond) {
474+
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_9(
475+
; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[A]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
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; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
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; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[B]], align 4
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
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; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
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; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
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; CHECK-NEXT: ret i32 [[RES_2]]
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;
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entry:
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br i1 %cond, label %then, label %else
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then:
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%l.1 = load i32, i32* %a, align 4
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%l.2 = load i32, i32* %b, align 4
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store i32 99, i32* %a
501+
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
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%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
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%res.0 = load i32, i32* %b, align 4
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br label %exit
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else:
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br label %exit
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exit:
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%p = phi i32* [ %min.select, %then ], [ %a, %else ]
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%v = phi i32 [ %res.0, %then ], [ 10, %else ]
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%res.2 = load i32, i32* %p, align 4
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%add = add i32 %res.2, %v
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ret i32 %res.2
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}
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define i32 @test_pointer_phi_select_simp_store_clobber_10(i32* %a, i32* %b, i1 %cond) {
518+
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_10(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[A]], align 4
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; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
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; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
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; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[L_2]], [[THEN]] ], [ 10, [[ELSE]] ]
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; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
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; CHECK-NEXT: ret i32 [[RES_2]]
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;
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entry:
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br i1 %cond, label %then, label %else
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then:
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%l.1 = load i32, i32* %a, align 4
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store i32 99, i32* %a
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%l.2 = load i32, i32* %b, align 4
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%cmp.i.i.i = icmp ult i32 %l.1, %l.2
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%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
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%res.0 = load i32, i32* %b, align 4
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br label %exit
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else:
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br label %exit
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exit:
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%p = phi i32* [ %min.select, %then ], [ %a, %else ]
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%v = phi i32 [ %res.0, %then ], [ 10, %else ]
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%res.2 = load i32, i32* %p, align 4
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%add = add i32 %res.2, %v
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ret i32 %res.2
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}
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define i32 @test_pointer_phi_select_simp_store_clobber_11(i32* %a, i32* %b, i1 %cond) {
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; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_11(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[B]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
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; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
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; CHECK-NEXT: [[V:%.*]] = phi i32 [ 99, [[THEN]] ], [ 10, [[ELSE]] ]
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; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
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; CHECK-NEXT: ret i32 [[RES_2]]
579+
;
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entry:
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br i1 %cond, label %then, label %else
582+
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then:
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%l.1 = load i32, i32* %a, align 4
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%l.2 = load i32, i32* %b, align 4
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store i32 99, i32* %b
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%cmp.i.i.i = icmp ult i32 %l.1, %l.2
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%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
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%res.0 = load i32, i32* %b, align 4
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br label %exit
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else:
593+
br label %exit
594+
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exit:
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%p = phi i32* [ %min.select, %then ], [ %a, %else ]
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%v = phi i32 [ %res.0, %then ], [ 10, %else ]
598+
%res.2 = load i32, i32* %p, align 4
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%add = add i32 %res.2, %v
600+
ret i32 %res.2
601+
}
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603+
define i32 @test_pointer_phi_select_simp_store_clobber_12(i32* %a, i32* %b, i1 %cond) {
604+
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_12(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
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; CHECK-NEXT: store i32 99, i32* [[B:%.*]], align 4
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; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], 99
611+
; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
612+
; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: else:
614+
; CHECK-NEXT: br label [[EXIT]]
615+
; CHECK: exit:
616+
; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
617+
; CHECK-NEXT: [[V:%.*]] = phi i32 [ 99, [[THEN]] ], [ 10, [[ELSE]] ]
618+
; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
619+
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
620+
; CHECK-NEXT: ret i32 [[RES_2]]
621+
;
622+
entry:
623+
br i1 %cond, label %then, label %else
624+
625+
then:
626+
%l.1 = load i32, i32* %a, align 4
627+
store i32 99, i32* %b
628+
%l.2 = load i32, i32* %b, align 4
629+
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
630+
%min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
631+
%res.0 = load i32, i32* %b, align 4
632+
br label %exit
633+
634+
else:
635+
br label %exit
636+
637+
exit:
638+
%p = phi i32* [ %min.select, %then ], [ %a, %else ]
639+
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
640+
%res.2 = load i32, i32* %p, align 4
641+
%add = add i32 %res.2, %v
642+
ret i32 %res.2
643+
}
644+
385645
define i32 @test_pointer_phi_select_single_block_store(i32* %a, i32* %b) {
386646
; CHECK-LABEL: @test_pointer_phi_select_single_block_store(
387647
; CHECK-NEXT: entry:

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