@@ -252,7 +252,7 @@ VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
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// Pred stands for Predessor. Prev stands for Previous - last visited/created.
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BasicBlock *PrevBB = CFG.PrevBB ;
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BasicBlock *NewBB = BasicBlock::Create (PrevBB->getContext (), getName (),
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- PrevBB->getParent (), CFG.LastBB );
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+ PrevBB->getParent (), CFG.ExitBB );
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LLVM_DEBUG (dbgs () << " LV: created " << NewBB->getName () << ' \n ' );
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// Hook up the new basic block to its predecessors.
@@ -319,7 +319,7 @@ void VPBasicBlock::execute(VPTransformState *State) {
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UnreachableInst *Terminator = State->Builder .CreateUnreachable ();
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State->Builder .SetInsertPoint (Terminator);
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// Register NewBB in its loop. In innermost loops its the same for all BB's.
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- Loop *L = State->LI ->getLoopFor (State->CFG .LastBB );
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+ Loop *L = State->LI ->getLoopFor (State->CFG .PrevBB );
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L->addBasicBlockToLoop (NewBB, *State->LI );
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State->CFG .PrevBB = NewBB;
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}
@@ -756,9 +756,8 @@ void VPInstruction::generateInstruction(VPTransformState &State,
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Header = cast<VPBasicBlock>(Header->getSingleSuccessor ());
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}
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// TODO: Once the exit block is modeled in VPlan, use it instead of going
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- // through State.CFG.LastBB.
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- BasicBlock *Exit =
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- cast<BranchInst>(State.CFG .LastBB ->getTerminator ())->getSuccessor (0 );
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+ // through State.CFG.ExitBB.
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+ BasicBlock *Exit = State.CFG .ExitBB ;
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Builder.CreateCondBr (Cond, Exit, State.CFG .VPBB2IRBB [Header]);
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Builder.GetInsertBlock ()->getTerminator ()->eraseFromParent ();
@@ -909,11 +908,9 @@ void VPlan::execute(VPTransformState *State) {
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BasicBlock *VectorHeaderBB = VectorPreHeaderBB->getSingleSuccessor ();
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assert (VectorHeaderBB && " Loop preheader does not have a single successor." );
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- // 1. Make room to generate basic-blocks inside loop body if needed.
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- BasicBlock *VectorLatchBB = VectorHeaderBB->splitBasicBlock (
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- VectorHeaderBB->getFirstInsertionPt (), " vector.body.latch" );
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Loop *L = State->LI ->getLoopFor (VectorHeaderBB);
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- L->addBasicBlockToLoop (VectorLatchBB, *State->LI );
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+ State->CFG .ExitBB = L->getExitBlock ();
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+
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// Remove the edge between Header and Latch to allow other connections.
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// Temporarily terminate with unreachable until CFG is rewired.
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// Note: this asserts the generated code's assumption that
@@ -923,10 +920,9 @@ void VPlan::execute(VPTransformState *State) {
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UnreachableInst *Terminator = State->Builder .CreateUnreachable ();
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State->Builder .SetInsertPoint (Terminator);
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- // 2. Generate code in loop body.
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+ // Generate code in loop body.
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State->CFG .PrevVPBB = nullptr ;
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State->CFG .PrevBB = VectorHeaderBB;
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- State->CFG .LastBB = VectorLatchBB;
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for (VPBlockBase *Block : depth_first (Entry))
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Block->execute (State);
@@ -949,28 +945,7 @@ void VPlan::execute(VPTransformState *State) {
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}
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}
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- // 3. Merge the temporary latch created with the last basic-block filled.
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- BasicBlock *LastBB = State->CFG .PrevBB ;
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- assert (isa<BranchInst>(LastBB->getTerminator ()) &&
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- " Expected VPlan CFG to terminate with branch" );
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-
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- // Move both the branch and check from LastBB to VectorLatchBB.
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- auto *LastBranch = cast<BranchInst>(LastBB->getTerminator ());
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- LastBranch->moveBefore (VectorLatchBB->getTerminator ());
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- VectorLatchBB->getTerminator ()->eraseFromParent ();
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- // Move condition so it is guaranteed to be next to branch. This is only done
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- // to avoid excessive test updates.
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- // TODO: Remove special handling once the increments for all inductions are
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- // modeled explicitly in VPlan.
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- cast<Instruction>(LastBranch->getCondition ())->moveBefore (LastBranch);
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- // Connect LastBB to VectorLatchBB to facilitate their merge.
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- BranchInst::Create (VectorLatchBB, LastBB);
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-
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- // Merge LastBB with Latch.
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- bool Merged = MergeBlockIntoPredecessor (VectorLatchBB, nullptr , State->LI );
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- (void )Merged;
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- assert (Merged && " Could not merge last basic block with latch." );
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- VectorLatchBB = LastBB;
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+ BasicBlock *VectorLatchBB = State->CFG .PrevBB ;
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// Fix the latch value of canonical, reduction and first-order recurrences
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// phis in the vector loop.
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