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[LV] Do not create separate latch block in VPlan::execute.
Now that all dependencies on creating the latch block up-front have been removed, there is no need to create it early. Depends on D121618. Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D121619
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+11
-36
lines changed

2 files changed

+11
-36
lines changed

llvm/lib/Transforms/Vectorize/VPlan.cpp

Lines changed: 8 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -252,7 +252,7 @@ VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
252252
// Pred stands for Predessor. Prev stands for Previous - last visited/created.
253253
BasicBlock *PrevBB = CFG.PrevBB;
254254
BasicBlock *NewBB = BasicBlock::Create(PrevBB->getContext(), getName(),
255-
PrevBB->getParent(), CFG.LastBB);
255+
PrevBB->getParent(), CFG.ExitBB);
256256
LLVM_DEBUG(dbgs() << "LV: created " << NewBB->getName() << '\n');
257257

258258
// Hook up the new basic block to its predecessors.
@@ -319,7 +319,7 @@ void VPBasicBlock::execute(VPTransformState *State) {
319319
UnreachableInst *Terminator = State->Builder.CreateUnreachable();
320320
State->Builder.SetInsertPoint(Terminator);
321321
// Register NewBB in its loop. In innermost loops its the same for all BB's.
322-
Loop *L = State->LI->getLoopFor(State->CFG.LastBB);
322+
Loop *L = State->LI->getLoopFor(State->CFG.PrevBB);
323323
L->addBasicBlockToLoop(NewBB, *State->LI);
324324
State->CFG.PrevBB = NewBB;
325325
}
@@ -756,9 +756,8 @@ void VPInstruction::generateInstruction(VPTransformState &State,
756756
Header = cast<VPBasicBlock>(Header->getSingleSuccessor());
757757
}
758758
// TODO: Once the exit block is modeled in VPlan, use it instead of going
759-
// through State.CFG.LastBB.
760-
BasicBlock *Exit =
761-
cast<BranchInst>(State.CFG.LastBB->getTerminator())->getSuccessor(0);
759+
// through State.CFG.ExitBB.
760+
BasicBlock *Exit = State.CFG.ExitBB;
762761

763762
Builder.CreateCondBr(Cond, Exit, State.CFG.VPBB2IRBB[Header]);
764763
Builder.GetInsertBlock()->getTerminator()->eraseFromParent();
@@ -909,11 +908,9 @@ void VPlan::execute(VPTransformState *State) {
909908
BasicBlock *VectorHeaderBB = VectorPreHeaderBB->getSingleSuccessor();
910909
assert(VectorHeaderBB && "Loop preheader does not have a single successor.");
911910

912-
// 1. Make room to generate basic-blocks inside loop body if needed.
913-
BasicBlock *VectorLatchBB = VectorHeaderBB->splitBasicBlock(
914-
VectorHeaderBB->getFirstInsertionPt(), "vector.body.latch");
915911
Loop *L = State->LI->getLoopFor(VectorHeaderBB);
916-
L->addBasicBlockToLoop(VectorLatchBB, *State->LI);
912+
State->CFG.ExitBB = L->getExitBlock();
913+
917914
// Remove the edge between Header and Latch to allow other connections.
918915
// Temporarily terminate with unreachable until CFG is rewired.
919916
// Note: this asserts the generated code's assumption that
@@ -923,10 +920,9 @@ void VPlan::execute(VPTransformState *State) {
923920
UnreachableInst *Terminator = State->Builder.CreateUnreachable();
924921
State->Builder.SetInsertPoint(Terminator);
925922

926-
// 2. Generate code in loop body.
923+
// Generate code in loop body.
927924
State->CFG.PrevVPBB = nullptr;
928925
State->CFG.PrevBB = VectorHeaderBB;
929-
State->CFG.LastBB = VectorLatchBB;
930926

931927
for (VPBlockBase *Block : depth_first(Entry))
932928
Block->execute(State);
@@ -949,28 +945,7 @@ void VPlan::execute(VPTransformState *State) {
949945
}
950946
}
951947

952-
// 3. Merge the temporary latch created with the last basic-block filled.
953-
BasicBlock *LastBB = State->CFG.PrevBB;
954-
assert(isa<BranchInst>(LastBB->getTerminator()) &&
955-
"Expected VPlan CFG to terminate with branch");
956-
957-
// Move both the branch and check from LastBB to VectorLatchBB.
958-
auto *LastBranch = cast<BranchInst>(LastBB->getTerminator());
959-
LastBranch->moveBefore(VectorLatchBB->getTerminator());
960-
VectorLatchBB->getTerminator()->eraseFromParent();
961-
// Move condition so it is guaranteed to be next to branch. This is only done
962-
// to avoid excessive test updates.
963-
// TODO: Remove special handling once the increments for all inductions are
964-
// modeled explicitly in VPlan.
965-
cast<Instruction>(LastBranch->getCondition())->moveBefore(LastBranch);
966-
// Connect LastBB to VectorLatchBB to facilitate their merge.
967-
BranchInst::Create(VectorLatchBB, LastBB);
968-
969-
// Merge LastBB with Latch.
970-
bool Merged = MergeBlockIntoPredecessor(VectorLatchBB, nullptr, State->LI);
971-
(void)Merged;
972-
assert(Merged && "Could not merge last basic block with latch.");
973-
VectorLatchBB = LastBB;
948+
BasicBlock *VectorLatchBB = State->CFG.PrevBB;
974949

975950
// Fix the latch value of canonical, reduction and first-order recurrences
976951
// phis in the vector loop.

llvm/lib/Transforms/Vectorize/VPlan.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -307,9 +307,9 @@ struct VPTransformState {
307307
/// header BasicBlock.
308308
BasicBlock *PrevBB = nullptr;
309309

310-
/// The last IR BasicBlock in the output IR. Set to the new latch
311-
/// BasicBlock, used for placing the newly created BasicBlocks.
312-
BasicBlock *LastBB = nullptr;
310+
/// The last IR BasicBlock in the output IR. Set to the exit block of the
311+
/// vector loop.
312+
BasicBlock *ExitBB = nullptr;
313313

314314
/// The IR BasicBlock that is the preheader of the vector loop in the output
315315
/// IR.

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