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Revert "[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation"
Failing buildbot https://green.lab.llvm.org/green/job/clang-stage1-RA/34684/ This reverts commit 11ebe3d.
1 parent 42564f9 commit e872e16

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4 files changed

+18
-32
lines changed

4 files changed

+18
-32
lines changed

llvm/lib/MC/MCAssembler.cpp

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1110,17 +1110,16 @@ bool MCAssembler::relaxDwarfCallFrameFragment(MCAsmLayout &Layout,
11101110
return WasRelaxed;
11111111

11121112
MCContext &Context = Layout.getAssembler().getContext();
1113-
int64_t Value;
1114-
bool Abs = DF.getAddrDelta().evaluateAsAbsolute(Value, Layout);
1115-
assert(Abs && "CFA with invalid expression");
1116-
(void)Abs;
1117-
1113+
uint64_t OldSize = DF.getContents().size();
1114+
int64_t AddrDelta;
1115+
bool Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout);
1116+
assert(Abs && "We created call frame with an invalid expression");
1117+
(void) Abs;
11181118
SmallVectorImpl<char> &Data = DF.getContents();
1119-
uint64_t OldSize = Data.size();
11201119
Data.clear();
11211120
DF.getFixups().clear();
11221121

1123-
MCDwarfFrameEmitter::encodeAdvanceLoc(Context, Value, Data);
1122+
MCDwarfFrameEmitter::encodeAdvanceLoc(Context, AddrDelta, Data);
11241123
return OldSize != Data.size();
11251124
}
11261125

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -273,15 +273,14 @@ bool RISCVAsmBackend::relaxDwarfLineAddr(MCDwarfLineAddrFragment &DF,
273273
bool RISCVAsmBackend::relaxDwarfCFA(MCDwarfCallFrameFragment &DF,
274274
MCAsmLayout &Layout,
275275
bool &WasRelaxed) const {
276+
276277
const MCExpr &AddrDelta = DF.getAddrDelta();
277278
SmallVectorImpl<char> &Data = DF.getContents();
278279
SmallVectorImpl<MCFixup> &Fixups = DF.getFixups();
279280
size_t OldSize = Data.size();
280281

281282
int64_t Value;
282-
if (AddrDelta.evaluateAsAbsolute(Value, Layout.getAssembler()))
283-
return false;
284-
bool IsAbsolute = AddrDelta.evaluateAsAbsolute(Value, Layout);
283+
bool IsAbsolute = AddrDelta.evaluateKnownAbsolute(Value, Layout);
285284
assert(IsAbsolute && "CFA with invalid expression");
286285
(void)IsAbsolute;
287286

llvm/test/DebugInfo/RISCV/relax-debug-frame.ll

Lines changed: 8 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -7,29 +7,15 @@
77
; RELAX-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
88
; RELAX-NEXT: 0x20 R_RISCV_ADD32 - 0x0
99
; RELAX-NEXT: 0x20 R_RISCV_SUB32 - 0x0
10-
; RELAX-NEXT: 0x30 R_RISCV_32_PCREL - 0x0
11-
; RELAX-NEXT: 0x34 R_RISCV_ADD32 - 0x0
12-
; RELAX-NEXT: 0x34 R_RISCV_SUB32 - 0x0
13-
; RELAX-NEXT: 0x44 R_RISCV_32_PCREL - 0x0
14-
; RELAX-NEXT: 0x48 R_RISCV_ADD32 - 0x0
15-
; RELAX-NEXT: 0x48 R_RISCV_SUB32 - 0x0
16-
; RELAX-NEXT: }
17-
10+
; RELAX-NOT: }
11+
; RELAX: 0x39 R_RISCV_SET6 - 0x0
12+
; RELAX-NEXT: 0x39 R_RISCV_SUB6 - 0x0
13+
;
1814
; RELAX-DWARFDUMP-NOT: error: failed to compute relocation
19-
; RELAX-DWARFDUMP: FDE
20-
; RELAX-DWARFDUMP-NEXT: Format:
21-
; RELAX-DWARFDUMP: DW_CFA_advance_loc: 4
22-
; RELAX-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +16
23-
; RELAX-DWARFDUMP-EMPTY:
24-
25-
; RELAX-DWARFDUMP: FDE
26-
; RELAX-DWARFDUMP: Format:
27-
; RELAX-DWARFDUMP-NEXT: DW_CFA_advance_loc: 4
28-
; RELAX-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +16
29-
; RELAX-DWARFDUMP-NEXT: DW_CFA_advance_loc: 4
30-
; RELAX-DWARFDUMP-NEXT: DW_CFA_offset: X1 -4
31-
; RELAX-DWARFDUMP-NEXT: DW_CFA_nop
32-
; RELAX-DWARFDUMP-EMPTY:
15+
; RELAX-DWARFDUMP: CIE
16+
; RELAX-DWARFDUMP: DW_CFA_advance_loc
17+
; RELAX-DWARFDUMP: DW_CFA_def_cfa_offset
18+
; RELAX-DWARFDUMP: DW_CFA_offset
3319
source_filename = "frame.c"
3420

3521
; Function Attrs: noinline nounwind optnone

llvm/test/MC/ELF/RISCV/gen-dwarf.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,8 @@
4545
# RELOC-NEXT: 0x20 R_RISCV_SUB32 - 0x0
4646
# RELOC-NEXT: 0x25 R_RISCV_SET6 - 0x0
4747
# RELOC-NEXT: 0x25 R_RISCV_SUB6 - 0x0
48+
# RELOC-NEXT: 0x28 R_RISCV_SET6 - 0x0
49+
# RELOC-NEXT: 0x28 R_RISCV_SUB6 - 0x0
4850
# RELOC-NEXT: 0x34 R_RISCV_32_PCREL - 0x0
4951
# RELOC-NEXT: 0x38 R_RISCV_ADD32 - 0x0
5052
# RELOC-NEXT: 0x38 R_RISCV_SUB32 - 0x0

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