[RISCV][GISEL] Fix RUN lines in vararg.ll

The `< %s` needed to be removed. This change fixes the test introduced
in 02379d1

Author: michaelmaitland

llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll

@@ -1,21 +1,21 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -verify-machineinstrs < %s \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV32,ILP32 %s
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -mattr=+d -verify-machineinstrs < %s \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -mattr=+d -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV32,RV32D-ILP32 %s
 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -mattr=+d -target-abi ilp32f \
-; RUN:     -verify-machineinstrs < %s \
+; RUN:     -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV32,RV32D-ILP32F %s
 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel  -mattr=+d -target-abi ilp32d \
-; RUN:     -verify-machineinstrs < %s \
+; RUN:     -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV32,RV32D-ILP32D %s
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel  -verify-machineinstrs < %s \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel  -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV64,LP64 %s
 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel  -mattr=+d -target-abi lp64f \
-; RUN:     -verify-machineinstrs < %s \
+; RUN:     -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV64,LP64F %s
 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel  -mattr=+d -target-abi lp64d \
-; RUN:     -verify-machineinstrs < %s \
+; RUN:     -verify-machineinstrs \
 ; RUN:   | FileCheck -check-prefixes=RV64,LP64D %s
 
 ; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for