@@ -1569,7 +1569,7 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
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auto Next = ++MachineBasicBlock::iterator (VPST);
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assert (getVPTInstrPredicate (*Next) != ARMVCC::None &&
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" The instruction after a VPST must be predicated" );
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-
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+ ( void )Next;
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MachineInstr *VprDef = RDA->getUniqueReachingMIDef (VPST, ARM::VPR);
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if (VprDef && VCMPOpcodeToVPT (VprDef->getOpcode ()) &&
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!LoLoop.ToRemove .contains (VprDef)) {
@@ -1578,13 +1578,11 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
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// the same values at the VPST
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if (RDA->hasSameReachingDef (VCMP, VPST, VCMP->getOperand (1 ).getReg ()) &&
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RDA->hasSameReachingDef (VCMP, VPST, VCMP->getOperand (2 ).getReg ())) {
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- bool IntermediateInstrsUseVPR =
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- std::any_of (++MachineBasicBlock::iterator (VCMP),
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- MachineBasicBlock::iterator (VPST), hasVPRUse);
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// If the instruction after the VCMP is predicated then a different
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// code path is expected to have merged the VCMP and VPST already.
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// This assertion protects against changes to that behaviour
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- assert (!IntermediateInstrsUseVPR &&
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+ assert (!std::any_of (++MachineBasicBlock::iterator (VCMP),
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+ MachineBasicBlock::iterator (VPST), hasVPRUse) &&
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" Instructions between the VCMP and VPST are not expected to "
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" be predicated" );
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ReplaceVCMPWithVPT (VCMP, VPST);
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