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[mips] Use less registers to load address of TargetExternalSymbol
There is no pattern matched `add hi, (MipsLo texternalsym)`. As a result, loading an address of 32-bit symbol requires two registers and one more additional instruction: ``` addiu $1, $zero, %lo(foo) lui $2, %hi(foo) addu $25, $2, $1 ``` This patch adds the missed pattern and enables generation more effective set of instructions: ``` lui $1, %hi(foo) addiu $25, $1, %lo(foo) ``` Differential Revision: https://reviews.llvm.org/D66771 llvm-svn: 370196
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lines changed

3 files changed

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llvm/lib/Target/Mips/MipsInstrInfo.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3165,6 +3165,8 @@ multiclass MipsHiLoRelocs<Instruction Lui, Instruction Addiu,
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(Addiu GPROpnd:$hi, tconstpool:$lo)>;
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def : MipsPat<(add GPROpnd:$hi, (MipsLo tglobaltlsaddr:$lo)),
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(Addiu GPROpnd:$hi, tglobaltlsaddr:$lo)>;
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def : MipsPat<(add GPROpnd:$hi, (MipsLo texternalsym:$lo)),
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(Addiu GPROpnd:$hi, texternalsym:$lo)>;
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}
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// wrapper_pic

llvm/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,10 @@ define void @caller() {
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; O32-NEXT: addiu $25, $1, %lo(callee)
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; O32-NEXT: jalr.hb $25
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; O32-NEXT: nop
31-
; O32-NEXT: addiu $1, $zero, %lo(memset)
32-
; O32-NEXT: lui $2, %hi(memset)
33-
; O32-NEXT: addu $25, $2, $1
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; O32-NEXT: lui $1, %hi(val)
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; O32-NEXT: addiu $4, $1, %lo(val)
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; O32-NEXT: lui $1, %hi(memset)
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; O32-NEXT: addiu $25, $1, %lo(memset)
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; O32-NEXT: addiu $5, $zero, 0
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; O32-NEXT: jalr.hb $25
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; O32-NEXT: addiu $6, $zero, 80
@@ -50,11 +49,10 @@ define void @caller() {
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; N32-NEXT: addiu $25, $1, %lo(callee)
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; N32-NEXT: jalr.hb $25
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; N32-NEXT: nop
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; N32-NEXT: addiu $1, $zero, %lo(memset)
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; N32-NEXT: lui $2, %hi(memset)
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; N32-NEXT: addu $25, $2, $1
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; N32-NEXT: lui $1, %hi(val)
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; N32-NEXT: addiu $4, $1, %lo(val)
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; N32-NEXT: lui $1, %hi(memset)
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; N32-NEXT: addiu $25, $1, %lo(memset)
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; N32-NEXT: daddiu $5, $zero, 0
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; N32-NEXT: jalr.hb $25
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; N32-NEXT: daddiu $6, $zero, 80
@@ -83,8 +81,7 @@ define void @caller() {
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; N64-NEXT: lui $2, %hi(memset)
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; N64-NEXT: daddu $1, $1, $2
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $2, $zero, %lo(memset)
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; N64-NEXT: daddu $25, $1, $2
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; N64-NEXT: daddiu $25, $1, %lo(memset)
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; N64-NEXT: lui $1, %highest(val)
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; N64-NEXT: daddiu $1, $1, %higher(val)
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; N64-NEXT: dsll $1, $1, 16

llvm/test/CodeGen/Mips/long-calls.ll

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -33,9 +33,8 @@ define void @caller() {
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; ON32: addiu $25, $1, %lo(callee)
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; ON32: jalr $25
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36-
; ON32: addiu $1, $zero, %lo(memset)
37-
; ON32: lui $2, %hi(memset)
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; ON32: addu $25, $2, $1
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; ON32: lui $1, %hi(memset)
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; ON32: addiu $25, $1, %lo(memset)
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; ON32: jalr $25
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; ON64: lui $1, %highest(callee)
@@ -47,8 +46,7 @@ define void @caller() {
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; ON64: daddiu $1, $zero, %higher(memset)
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; ON64: lui $2, %highest(memset)
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; ON64: lui $2, %hi(memset)
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; ON64: daddiu $2, $zero, %lo(memset)
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; ON64: daddu $25, $1, $2
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; ON64: daddiu $25, $1, %lo(memset)
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; ON64: jalr $25
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call void @callee()

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