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[X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (llvm#145043)
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3 files changed

+23
-33
lines changed

3 files changed

+23
-33
lines changed

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -58844,16 +58844,18 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5884458844
llvm::all_of(Ops, [](SDValue Op) {
5884558845
return Op.getConstantOperandAPInt(1) == 32;
5884658846
})) {
58847-
SDValue Res = DAG.getBitcast(MVT::v8i32, ConcatSubOperand(VT, Ops, 0));
58848-
SDValue Zero = getZeroVector(MVT::v8i32, Subtarget, DAG, DL);
58849-
if (Opcode == X86ISD::VSHLI) {
58850-
Res = DAG.getVectorShuffle(MVT::v8i32, DL, Res, Zero,
58851-
{8, 0, 8, 2, 8, 4, 8, 6});
58852-
} else {
58853-
Res = DAG.getVectorShuffle(MVT::v8i32, DL, Res, Zero,
58854-
{1, 8, 3, 8, 5, 8, 7, 8});
58847+
if (SDValue Res = CombineSubOperand(VT, Ops, 0)) {
58848+
SDValue Zero = getZeroVector(MVT::v8i32, Subtarget, DAG, DL);
58849+
Res = DAG.getBitcast(MVT::v8i32, Res);
58850+
if (Opcode == X86ISD::VSHLI) {
58851+
Res = DAG.getVectorShuffle(MVT::v8i32, DL, Res, Zero,
58852+
{8, 0, 8, 2, 8, 4, 8, 6});
58853+
} else {
58854+
Res = DAG.getVectorShuffle(MVT::v8i32, DL, Res, Zero,
58855+
{1, 8, 3, 8, 5, 8, 7, 8});
58856+
}
58857+
return DAG.getBitcast(VT, Res);
5885558858
}
58856-
return DAG.getBitcast(VT, Res);
5885758859
}
5885858860
[[fallthrough]];
5885958861
case X86ISD::VSRAI:

‎llvm/test/CodeGen/X86/vector-shift-lshr-256.ll

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1974,11 +1974,9 @@ define <4 x i64> @shift32_v4i64(<4 x i64> %a) nounwind {
19741974
define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
19751975
; AVX1-LABEL: shift32_v4i64_concat:
19761976
; AVX1: # %bb.0:
1977-
; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1977+
; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
1978+
; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1
19781979
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1979-
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1980-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
1981-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
19821980
; AVX1-NEXT: retq
19831981
;
19841982
; AVX2-LABEL: shift32_v4i64_concat:
@@ -1990,11 +1988,9 @@ define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
19901988
;
19911989
; XOPAVX1-LABEL: shift32_v4i64_concat:
19921990
; XOPAVX1: # %bb.0:
1993-
; XOPAVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1991+
; XOPAVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
1992+
; XOPAVX1-NEXT: vpsrlq $32, %xmm1, %xmm1
19941993
; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1995-
; XOPAVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1996-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
1997-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
19981994
; XOPAVX1-NEXT: retq
19991995
;
20001996
; XOPAVX2-LABEL: shift32_v4i64_concat:
@@ -2020,11 +2016,9 @@ define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
20202016
;
20212017
; X86-AVX1-LABEL: shift32_v4i64_concat:
20222018
; X86-AVX1: # %bb.0:
2023-
; X86-AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
2019+
; X86-AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
2020+
; X86-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1
20242021
; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
2025-
; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
2026-
; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
2027-
; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
20282022
; X86-AVX1-NEXT: retl
20292023
;
20302024
; X86-AVX2-LABEL: shift32_v4i64_concat:

‎llvm/test/CodeGen/X86/vector-shift-shl-256.ll

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1827,11 +1827,9 @@ define <4 x i64> @shift32_v4i64(<4 x i64> %a) nounwind {
18271827
define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
18281828
; AVX1-LABEL: shift32_v4i64_concat:
18291829
; AVX1: # %bb.0:
1830-
; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1830+
; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0
1831+
; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1
18311832
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1832-
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1833-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
1834-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
18351833
; AVX1-NEXT: retq
18361834
;
18371835
; AVX2-LABEL: shift32_v4i64_concat:
@@ -1843,11 +1841,9 @@ define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
18431841
;
18441842
; XOPAVX1-LABEL: shift32_v4i64_concat:
18451843
; XOPAVX1: # %bb.0:
1846-
; XOPAVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1844+
; XOPAVX1-NEXT: vpsllq $32, %xmm0, %xmm0
1845+
; XOPAVX1-NEXT: vpsllq $32, %xmm1, %xmm1
18471846
; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1848-
; XOPAVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1849-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
1850-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
18511847
; XOPAVX1-NEXT: retq
18521848
;
18531849
; XOPAVX2-LABEL: shift32_v4i64_concat:
@@ -1873,11 +1869,9 @@ define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
18731869
;
18741870
; X86-AVX1-LABEL: shift32_v4i64_concat:
18751871
; X86-AVX1: # %bb.0:
1876-
; X86-AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1872+
; X86-AVX1-NEXT: vpsllq $32, %xmm0, %xmm0
1873+
; X86-AVX1-NEXT: vpsllq $32, %xmm1, %xmm1
18771874
; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1878-
; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1879-
; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
1880-
; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
18811875
; X86-AVX1-NEXT: retl
18821876
;
18831877
; X86-AVX2-LABEL: shift32_v4i64_concat:

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