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2 parents 4b9da0d + 4a2ab3a commit fc88c28Copy full SHA for fc88c28
llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -411,7 +411,7 @@ def FeatureStdExtZcf
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def FeatureStdExtZclsd
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: RISCVExtension<1, 0,
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"Compressed Load/Store Pair Instructions",
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- [FeatureStdExtZilsd,FeatureStdExtZca]>;
+ [FeatureStdExtZilsd, FeatureStdExtZca]>;
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def HasStdExtZclsd : Predicate<"Subtarget->hasStdExtZclsd()">,
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AssemblerPredicate<(all_of FeatureStdExtZclsd),
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"'Zclsd' (Compressed Load/Store pair instructions)">;
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