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Fix typos in comments
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4 files changed

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-4
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4 files changed

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llvm/lib/CodeGen/VirtRegMap.cpp

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Original file line numberDiff line numberDiff line change
@@ -311,7 +311,7 @@ void VirtRegRewriter::addLiveInsForSubRanges(const LiveInterval &LI,
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}
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// Check all mbb start positions between First and Last while
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// simulatenously advancing an iterator for each subrange.
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// simultaneously advancing an iterator for each subrange.
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for (SlotIndexes::MBBIndexIterator MBBI = Indexes->findMBBIndex(First);
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MBBI != Indexes->MBBIndexEnd() && MBBI->first <= Last; ++MBBI) {
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SlotIndex MBBBegin = MBBI->first;

llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12004,7 +12004,7 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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TpLoopBody->moveAfter(TpEntry);
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TpExit->moveAfter(TpLoopBody);
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// Finally, remove the memcpy Psuedo Instruction
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// Finally, remove the memcpy Pseudo Instruction
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MI.eraseFromParent();
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// Return the exit block as it may contain other instructions requiring a

llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir

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@@ -1,7 +1,7 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -run-pass=fastpretileconfig -o - %s | FileCheck %s
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# Test the case which has TILELOADD being mixed in psuedo AMX instruction
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# Test the case which has TILELOADD being mixed in pseudo AMX instruction
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...
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---
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name: main

llvm/unittests/ProfileData/MemProfTest.cpp

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Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ TEST(MemProf, FillsValue) {
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Records.insert({Pair.first, Pair.second});
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}
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// Mock program psuedocode and expected memprof record contents.
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// Mock program pseudocode and expected memprof record contents.
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//
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// AllocSite CallSite
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// inline foo() { new(); } Y N

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