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[llvm] Fixing MIRVRegNamerUtils to properly handle 2+ MachineBasicBlocks.
An interplay of code from D70210, along with code from the Value-Numbering-esque hash-based namer from D70210, as well as some crusty code from the original MIR-Canon code lead to multiple causes of failure when canonicalizing or renaming vregs for MIR with multiple basic blocks. This patch fixes those issues while deleting some no longer needed code and adding a nice diamond test case to boot. Differential Revision: https://reviews.llvm.org/D70478
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4 files changed

+69
-31
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4 files changed

+69
-31
lines changed

llvm/lib/CodeGen/MIRCanonicalizerPass.cpp

Lines changed: 5 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -49,10 +49,6 @@ static cl::opt<unsigned>
4949
cl::value_desc("N"),
5050
cl::desc("Function number to canonicalize."));
5151

52-
static cl::opt<unsigned> CanonicalizeBasicBlockNumber(
53-
"canon-nth-basicblock", cl::Hidden, cl::init(~0u), cl::value_desc("N"),
54-
cl::desc("BasicBlock number to canonicalize."));
55-
5652
namespace {
5753

5854
class MIRCanonicalizer : public MachineFunctionPass {
@@ -374,32 +370,14 @@ static bool doDefKillClear(MachineBasicBlock *MBB) {
374370
}
375371

376372
static bool runOnBasicBlock(MachineBasicBlock *MBB,
377-
std::vector<StringRef> &bbNames,
378-
unsigned &basicBlockNum, VRegRenamer &Renamer) {
379-
380-
if (CanonicalizeBasicBlockNumber != ~0U) {
381-
if (CanonicalizeBasicBlockNumber != basicBlockNum++)
382-
return false;
383-
LLVM_DEBUG(dbgs() << "\n Canonicalizing BasicBlock " << MBB->getName()
384-
<< "\n";);
385-
}
386-
387-
if (llvm::find(bbNames, MBB->getName()) != bbNames.end()) {
388-
LLVM_DEBUG({
389-
dbgs() << "Found potentially duplicate BasicBlocks: " << MBB->getName()
390-
<< "\n";
391-
});
392-
return false;
393-
}
394-
373+
unsigned BasicBlockNum, VRegRenamer &Renamer) {
395374
LLVM_DEBUG({
396375
dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << " \n\n";
397376
dbgs() << "\n\n================================================\n\n";
398377
});
399378

400379
bool Changed = false;
401380

402-
bbNames.push_back(MBB->getName());
403381
LLVM_DEBUG(dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << "\n\n";);
404382

405383
LLVM_DEBUG(dbgs() << "MBB Before Canonical Copy Propagation:\n";
@@ -412,8 +390,10 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB,
412390
Changed |= rescheduleCanonically(IdempotentInstCount, MBB);
413391
LLVM_DEBUG(dbgs() << "MBB After Scheduling:\n"; MBB->dump(););
414392

415-
Changed |= Renamer.renameVRegs(MBB);
393+
Changed |= Renamer.renameVRegs(MBB, BasicBlockNum);
416394

395+
// TODO: Consider dropping this. Dropping kill defs is probably not
396+
// semantically sound.
417397
Changed |= doDefKillClear(MBB);
418398

419399
LLVM_DEBUG(dbgs() << "Updated MachineBasicBlock:\n"; MBB->dump();
@@ -445,16 +425,12 @@ bool MIRCanonicalizer::runOnMachineFunction(MachineFunction &MF) {
445425
: RPOList) { dbgs() << MBB->getName() << "\n"; } dbgs()
446426
<< "\n\n================================================\n\n";);
447427

448-
std::vector<StringRef> BBNames;
449-
450428
unsigned BBNum = 0;
451-
452429
bool Changed = false;
453-
454430
MachineRegisterInfo &MRI = MF.getRegInfo();
455431
VRegRenamer Renamer(MRI);
456432
for (auto MBB : RPOList)
457-
Changed |= runOnBasicBlock(MBB, BBNames, BBNum, Renamer);
433+
Changed |= runOnBasicBlock(MBB, BBNum++, Renamer);
458434

459435
return Changed;
460436
}

llvm/lib/CodeGen/MIRNamerPass.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -57,9 +57,10 @@ class MIRNamer : public MachineFunctionPass {
5757

5858
VRegRenamer Renamer(MF.getRegInfo());
5959

60+
unsigned BBIndex = 0;
6061
ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
6162
for (auto &MBB : RPOT)
62-
Changed |= Renamer.renameVRegs(MBB);
63+
Changed |= Renamer.renameVRegs(MBB, BBIndex++);
6364

6465
return Changed;
6566
}

llvm/lib/CodeGen/MIRVRegNamerUtils.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ class VRegRenamer {
8484

8585
/// Same as the above, but sets a BBNum depending on BB traversal that
8686
/// will be used as prefix for the vreg names.
87-
bool renameVRegs(MachineBasicBlock *MBB, unsigned BBNum = 0);
87+
bool renameVRegs(MachineBasicBlock *MBB, unsigned BBNum);
8888

8989
unsigned getCurrentBBNumber() const { return CurrentBBNumber; }
9090
};
Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
1+
# RUN: llc -run-pass mir-namer -x mir -verify-machineinstrs %s -o - | FileCheck %s
2+
# RUN: llc -run-pass mir-canonicalizer -x mir -verify-machineinstrs %s -o - | FileCheck %s
3+
--- |
4+
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
5+
target triple = "x86_64-unknown-linux-gnu"
6+
define i32 @_Z1fi(i32 %arg) {
7+
%tmp = alloca i32, align 4
8+
%tmp1 = alloca i32, align 4
9+
ret i32 %arg
10+
}
11+
12+
...
13+
---
14+
name: _Z1fi
15+
registers:
16+
- { id: 0, class: _, preferred-register: '' }
17+
- { id: 1, class: _, preferred-register: '' }
18+
- { id: 2, class: _, preferred-register: '' }
19+
- { id: 3, class: _, preferred-register: '' }
20+
- { id: 4, class: _, preferred-register: '' }
21+
- { id: 5, class: _, preferred-register: '' }
22+
- { id: 6, class: _, preferred-register: '' }
23+
- { id: 7, class: _, preferred-register: '' }
24+
- { id: 8, class: _, preferred-register: '' }
25+
stack:
26+
- { id: 0, name: tmp, type: default, offset: 0, size: 4, alignment: 4 }
27+
- { id: 1, name: tmp1, type: default, offset: 0, size: 4, alignment: 4 }
28+
body: |
29+
bb.0:
30+
%tmp0:_(s32) = COPY $edi
31+
%tmp1:_(s32) = G_CONSTANT i32 0
32+
%tmp5:_(p0) = G_FRAME_INDEX %stack.0.tmp
33+
%tmp6:_(p0) = G_FRAME_INDEX %stack.1.tmp1
34+
G_STORE %tmp0(s32), %tmp5(p0) :: (store 4 into %ir.tmp)
35+
%tmp7:_(s32) = G_LOAD %tmp5(p0) :: (load 4 from %ir.tmp)
36+
%tmp8:_(s1) = G_ICMP intpred(ne), %tmp7(s32), %tmp1
37+
G_BRCOND %tmp8(s1), %bb.1
38+
G_BR %bb.2
39+
40+
; CHECK: bb.1:
41+
; CHECK: %bb2_{{[0-9]+}}__1:_(s32) = G_CONSTANT
42+
bb.1:
43+
%tmp4:_(s32) = G_CONSTANT i32 1
44+
G_STORE %tmp4(s32), %tmp6(p0) :: (store 4 into %ir.tmp1)
45+
G_BR %bb.3
46+
47+
48+
; CHECK: bb.2:
49+
; CHECK: %bb1_{{[0-9]+}}__1:_(s32) = G_CONSTANT
50+
bb.2:
51+
%tmp3:_(s32) = G_CONSTANT i32 2
52+
G_STORE %tmp3(s32), %tmp6(p0) :: (store 4 into %ir.tmp1)
53+
54+
; CHECK: bb.3:
55+
; CHECK: %bb3_{{[0-9]+}}__1:_(s32) = G_LOAD
56+
bb.3:
57+
%tmp9:_(s32) = G_LOAD %tmp6(p0) :: (load 4 from %ir.tmp1)
58+
$eax = COPY %tmp9(s32)
59+
RET 0, implicit $eax
60+
61+
...

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