🍒 [AArch64] Verify consecutive vector registers in tbl, tbx (#120262) #10327
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Table lookup instructions expect the vectors that define the table itself to be consecutive (wraparound allowed). Relevant documentation: https://developer.arm.com/documentation/100069/0606/SIMD-Vector-Instructions/TBL--vector-
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@swift-ci test llvm |
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@swift-ci test |
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@swift-ci test llvm |
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Cherry-picks llvm#120262.