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1 | 1 | // RUN: %target-swift-frontend %s -g -emit-ir -o - | %FileCheck %s
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2 | 2 |
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| 3 | +// REQUIRES: CPU=x86_64 |
| 4 | +// |
| 5 | +// We require x86_64 to make the test easier to read. Without this, |
| 6 | +// writing check lines that ensure our asm gadgets match up with the |
| 7 | +// right values is painfully hard to do. |
| 8 | + |
3 | 9 | func use<T>(_ x: T) {}
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4 | 10 |
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5 | 11 | func getInt32() -> Int32 { return -1 }
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6 | 12 |
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| 13 | +// CHECK-LABEL: define {{.*}}rangeExtension |
7 | 14 | public func rangeExtension(_ b: Bool) {
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8 |
| - // CHECK: define {{.*}}rangeExtension |
9 | 15 | let i = getInt32()
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10 |
| - // CHECK: llvm.dbg.value(metadata i32 [[I:.*]], metadata {{.*}}, metadata |
| 16 | + // CHECK: [[I:%.*]] = call swiftcc i32 @"{{.*}}getInt32 |
| 17 | + // CHECK-NEXT: [[I_ZEXT:%.*]] = zext i32 [[I]] to i64 |
| 18 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[I_ZEXT]]) |
| 19 | + // CHECK-NEXT: llvm.dbg.value(metadata i32 [[I]], metadata [[MD_I:!.*]], metadata |
| 20 | + |
11 | 21 | use(i)
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| 22 | + |
| 23 | + // CHECK: br i1 |
| 24 | + |
12 | 25 | if b {
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| 26 | + // CHECK: llvm.dbg.value(metadata i32 [[I]], metadata [[MD_I]] |
| 27 | + |
13 | 28 | let j = getInt32()
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14 |
| - // CHECK: llvm.dbg.value(metadata i32 [[I]], metadata {{.*}}, metadata |
15 |
| - // CHECK: llvm.dbg.value(metadata i32 [[J:.*]], metadata {{.*}}, metadata |
| 29 | + // CHECK: [[J:%.*]] = call swiftcc i32 @"{{.*}}getInt32 |
| 30 | + // CHECK-NEXT: [[J_ZEXT:%.*]] = zext i32 [[J]] to i64 |
| 31 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[J_ZEXT]]) |
| 32 | + // CHECK: llvm.dbg.value(metadata i32 [[J]], metadata [[MD_J:!.*]], metadata |
| 33 | + |
16 | 34 | use(j)
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17 |
| - // CHECK-DAG: {{(asm sideeffect "", "r".*)|(zext i32)}} [[J]] |
18 |
| - // CHECK-DAG: asm sideeffect "", "r" |
| 35 | + // CHECK: call swiftcc void @"{{.*}}use |
| 36 | + |
| 37 | + // CHECK: [[I_ZEXT:%.*]] = zext i32 [[I]] to i64 |
| 38 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[I_ZEXT]]) |
| 39 | + // CHECK-NEXT: [[J_ZEXT:%.*]] = zext i32 [[J]] to i64 |
| 40 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[J_ZEXT]]) |
| 41 | + |
| 42 | + // CHECK: br label |
19 | 43 | }
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| 44 | + |
| 45 | + // CHECK-NOT: llvm.dbg.value(metadata i32 [[J]] |
| 46 | + // CHECK: llvm.dbg.value(metadata i32 [[I]] |
| 47 | + |
20 | 48 | let z = getInt32()
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| 49 | + // CHECK: [[Z:%.*]] = call swiftcc i32 @"{{.*}}getInt32 |
| 50 | + // CHECK: llvm.dbg.value(metadata i32 [[Z]], metadata [[MD_Z:!.*]], metadata |
| 51 | + |
21 | 52 | use(z)
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22 |
| - // CHECK-NOT: llvm.dbg.value(metadata i32 [[J]], metadata {{.*}}, metadata |
23 |
| - // CHECK-DAG: llvm.dbg.value(metadata i32 [[I]], metadata {{.*}}, metadata |
24 |
| - // CHECK-DAG: llvm.dbg.value(metadata i32 [[Z:.*]], metadata {{.*}}, metadata |
25 |
| - // CHECK-DAG: {{(asm sideeffect "", "r".*)|(zext i32)}} [[I]] |
26 |
| - // CHECK-DAG: asm sideeffect "", "r" |
| 53 | + // CHECK: call swiftcc void @"{{.*}}use |
| 54 | + |
| 55 | + // CHECK: [[I_ZEXT:%.*]] = zext i32 [[I]] to i64 |
| 56 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[I_ZEXT]]) |
| 57 | + // CHECK-NEXT: [[Z_ZEXT:%.*]] = zext i32 [[Z]] to i64 |
| 58 | + // CHECK-NEXT: call void asm sideeffect "", "r"(i64 [[Z_ZEXT]]) |
27 | 59 | }
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| 60 | + |
| 61 | +// CHECK-DAG: [[MD_I]] = !DILocalVariable(name: "i" |
| 62 | +// CHECK-DAG: [[MD_J]] = !DILocalVariable(name: "j" |
| 63 | +// CHECK-DAG: [[MD_Z]] = !DILocalVariable(name: "z" |
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