Skip to content

Commit 58f5f9c

Browse files
author
Hal Finkel
committed
[PowerPC] Disable part-word atomics on the P7
As it turns out, even though these are part of ISA 2.06, the P7 does not support them (or, at least, not any P7s we're tested so far). llvm-svn: 234686
1 parent bec5235 commit 58f5f9c

File tree

2 files changed

+18
-18
lines changed

2 files changed

+18
-18
lines changed

llvm/lib/Target/PowerPC/PPC.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -163,12 +163,12 @@ def ProcessorFeatures {
163163
FeatureRecipPrec, FeatureSTFIWX, FeatureLFIWAX,
164164
FeatureFPRND, FeatureFPCVT, FeatureISEL,
165165
FeaturePOPCNTD, FeatureCMPB, FeatureLDBRX,
166-
Feature64Bit /*, Feature64BitRegs */, FeaturePartwordAtomic,
166+
Feature64Bit /*, Feature64BitRegs */,
167167
FeatureBPERMD, FeatureExtDiv,
168168
DeprecatedMFTB, DeprecatedDST];
169169
list<SubtargetFeature> Power8SpecificFeatures =
170170
[DirectivePwr8, FeatureP8Altivec, FeatureP8Vector, FeatureP8Crypto,
171-
FeatureHTM, FeatureDirectMove, FeatureICBT];
171+
FeatureHTM, FeatureDirectMove, FeatureICBT, FeaturePartwordAtomic];
172172
list<SubtargetFeature> Power8FeatureList =
173173
!listconcat(Power7FeatureList, Power8SpecificFeatures);
174174
}

llvm/test/CodeGen/PowerPC/atomic-2.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: llc < %s -march=ppc64 | FileCheck %s
2-
; RUN: llc < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-P7U
3-
; RUN: llc < %s -march=ppc64 -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P7U
2+
; RUN: llc < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s
3+
; RUN: llc < %s -march=ppc64 -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P8U
44

55
define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
66
; CHECK-LABEL: exchange_and_add:
@@ -12,17 +12,17 @@ define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
1212

1313
define i8 @exchange_and_add8(i8* %mem, i8 %val) nounwind {
1414
; CHECK-LABEL: exchange_and_add8:
15-
; CHECK-P7U: lbarx
15+
; CHECK-P8U: lbarx
1616
%tmp = atomicrmw add i8* %mem, i8 %val monotonic
17-
; CHECK-P7U: stbcx.
17+
; CHECK-P8U: stbcx.
1818
ret i8 %tmp
1919
}
2020

2121
define i16 @exchange_and_add16(i16* %mem, i16 %val) nounwind {
2222
; CHECK-LABEL: exchange_and_add16:
23-
; CHECK-P7U: lharx
23+
; CHECK-P8U: lharx
2424
%tmp = atomicrmw add i16* %mem, i16 %val monotonic
25-
; CHECK-P7U: sthcx.
25+
; CHECK-P8U: sthcx.
2626
ret i16 %tmp
2727
}
2828

@@ -38,21 +38,21 @@ define i64 @exchange_and_cmp(i64* %mem) nounwind {
3838

3939
define i8 @exchange_and_cmp8(i8* %mem) nounwind {
4040
; CHECK-LABEL: exchange_and_cmp8:
41-
; CHECK-P7U: lbarx
41+
; CHECK-P8U: lbarx
4242
%tmppair = cmpxchg i8* %mem, i8 0, i8 1 monotonic monotonic
4343
%tmp = extractvalue { i8, i1 } %tmppair, 0
44-
; CHECK-P7U: stbcx.
45-
; CHECK-P7U: stbcx.
44+
; CHECK-P8U: stbcx.
45+
; CHECK-P8U: stbcx.
4646
ret i8 %tmp
4747
}
4848

4949
define i16 @exchange_and_cmp16(i16* %mem) nounwind {
5050
; CHECK-LABEL: exchange_and_cmp16:
51-
; CHECK-P7U: lharx
51+
; CHECK-P8U: lharx
5252
%tmppair = cmpxchg i16* %mem, i16 0, i16 1 monotonic monotonic
5353
%tmp = extractvalue { i16, i1 } %tmppair, 0
54-
; CHECK-P7U: sthcx.
55-
; CHECK-P7U: sthcx.
54+
; CHECK-P8U: sthcx.
55+
; CHECK-P8U: sthcx.
5656
ret i16 %tmp
5757
}
5858

@@ -66,17 +66,17 @@ define i64 @exchange(i64* %mem, i64 %val) nounwind {
6666

6767
define i8 @exchange8(i8* %mem, i8 %val) nounwind {
6868
; CHECK-LABEL: exchange8:
69-
; CHECK-P7U: lbarx
69+
; CHECK-P8U: lbarx
7070
%tmp = atomicrmw xchg i8* %mem, i8 1 monotonic
71-
; CHECK-P7U: stbcx.
71+
; CHECK-P8U: stbcx.
7272
ret i8 %tmp
7373
}
7474

7575
define i16 @exchange16(i16* %mem, i16 %val) nounwind {
7676
; CHECK-LABEL: exchange16:
77-
; CHECK-P7U: lharx
77+
; CHECK-P8U: lharx
7878
%tmp = atomicrmw xchg i16* %mem, i16 1 monotonic
79-
; CHECK-P7U: sthcx.
79+
; CHECK-P8U: sthcx.
8080
ret i16 %tmp
8181
}
8282

0 commit comments

Comments
 (0)