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Merge pull request #1397 from gottesmm/remove-remaining-undefined-behavior-from-iterators
[upstream-update] dexonsmith in an upstream commit realized he missed an
2 parents 7d2273f + 650600a commit 5ace1b4

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3 files changed

+3
-3
lines changed

3 files changed

+3
-3
lines changed

lib/SILGen/SILGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -966,7 +966,7 @@ void SILGenModule::visitTopLevelCodeDecl(TopLevelCodeDecl *td) {
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}
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static void emitTopLevelProlog(SILGenFunction &gen, SILLocation loc) {
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assert(gen.B.getInsertionBB() == gen.F.begin()
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assert(gen.B.getInsertionBB()->getIterator() == gen.F.begin()
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&& "not at entry point?!");
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SILBasicBlock *entry = gen.B.getInsertionBB();

lib/SILOptimizer/Mandatory/InOutDeshadowing.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -199,7 +199,7 @@ static void analyzeUseOfInOut(Operand *UI, StackSlotState &state) {
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switch (UI->getOperandNumber()) {
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case 0: { // Source
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// Is this copy in the entry block?
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if (CAI->getParent() != CAI->getFunction()->begin())
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if (CAI->getParent()->getIterator() != CAI->getFunction()->begin())
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// Any copy from the inout outside of the entry block fails the analysis.
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// We don't need full flow-sensitive analysis for SILGen-ed code.
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return state.setFailed("inout is loaded outside of the entry block");

lib/SILOptimizer/Utils/CheckedCastBrJumpThreading.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -371,7 +371,7 @@ areEquivalentConditionsAlongSomePaths(CheckedCastBranchInst *DomCCBI,
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// Incoming values for the BBArg.
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SmallVector<SILValue, 4> IncomingValues;
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if (ArgBB != ArgBB->getParent()->begin() &&
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if (ArgBB->getIterator() != ArgBB->getParent()->begin() &&
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(!Arg->getIncomingValues(IncomingValues) || IncomingValues.empty()))
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return false;
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