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[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zero
:: (store 1 + 4, addrspace 1) -> :: (store 1 into undef + 4, addrspace 1) An offset without a base isn't terribly useful but it's convenient to update the offset without checking the value. For example, when breaking apart stores into smaller units Differential Revision: https://reviews.llvm.org/D97812
1 parent 3619279 commit 9fc2be6

30 files changed

+6404
-6369
lines changed

‎llvm/lib/CodeGen/MIRParser/MIParser.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2788,6 +2788,9 @@ static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
27882788
V = C;
27892789
break;
27902790
}
2791+
case MIToken::kw_undef:
2792+
V = nullptr;
2793+
return false;
27912794
default:
27922795
llvm_unreachable("The current token should be an IR block reference");
27932796
}
@@ -2948,12 +2951,12 @@ bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
29482951
if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
29492952
Token.isNot(MIToken::GlobalValue) &&
29502953
Token.isNot(MIToken::NamedGlobalValue) &&
2951-
Token.isNot(MIToken::QuotedIRValue))
2954+
Token.isNot(MIToken::QuotedIRValue) && Token.isNot(MIToken::kw_undef))
29522955
return error("expected an IR value reference");
29532956
const Value *V = nullptr;
29542957
if (parseIRValue(V))
29552958
return true;
2956-
if (!V->getType()->isPointerTy())
2959+
if (V && !V->getType()->isPointerTy())
29572960
return error("expected a pointer IR value");
29582961
lex();
29592962
int64_t Offset = 0;

‎llvm/lib/CodeGen/MachineOperand.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1160,6 +1160,11 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
11601160
break;
11611161
}
11621162
}
1163+
} else if (getOpaqueValue() == nullptr && getOffset() != 0) {
1164+
OS << ((isLoad() && isStore()) ? " on "
1165+
: isLoad() ? " from "
1166+
: " into ")
1167+
<< "undef";
11631168
}
11641169
MachineOperand::printOperandOffset(OS, getOffset());
11651170
if (getAlign() != getSize())

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ body: |
2222
; CHECK: G_STORE [[FPEXT]](<2 x s64>), [[COPY1]](p0) :: (store 16, align 32)
2323
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
2424
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C]](s64)
25-
; CHECK: G_STORE [[FPEXT1]](<2 x s64>), [[PTR_ADD]](p0) :: (store 16 + 16)
25+
; CHECK: G_STORE [[FPEXT1]](<2 x s64>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
2626
; CHECK: RET_ReallyLR
2727
%0:_(<4 x s32>) = COPY $q0
2828
%1:_(p0) = COPY $x0

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ body: |
120120
; CHECK: G_STORE [[CONCAT_VECTORS]](<4 x s32>), [[COPY5]](p0) :: (store 16, align 32)
121121
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
122122
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY5]], [[C]](s64)
123-
; CHECK: G_STORE [[CONCAT_VECTORS1]](<4 x s32>), [[PTR_ADD]](p0) :: (store 16 + 16)
123+
; CHECK: G_STORE [[CONCAT_VECTORS1]](<4 x s32>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
124124
; CHECK: RET_ReallyLR
125125
%2:_(<2 x s64>) = COPY $q0
126126
%3:_(<2 x s64>) = COPY $q1

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -319,7 +319,7 @@ body: |
319319
; CHECK: G_STORE [[BUILD_VECTOR]](<16 x s8>), %ptr(p0) :: (store 16, align 32)
320320
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
321321
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
322-
; CHECK: G_STORE [[BUILD_VECTOR1]](<16 x s8>), [[PTR_ADD]](p0) :: (store 16 + 16)
322+
; CHECK: G_STORE [[BUILD_VECTOR1]](<16 x s8>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
323323
; CHECK: RET_ReallyLR
324324
%val:_(<32 x s8>) = G_IMPLICIT_DEF
325325
%ptr:_(p0) = COPY $x0
@@ -343,7 +343,7 @@ body: |
343343
; CHECK: G_STORE [[BUILD_VECTOR]](<8 x s16>), %ptr(p0) :: (store 16, align 32)
344344
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
345345
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
346-
; CHECK: G_STORE [[BUILD_VECTOR1]](<8 x s16>), [[PTR_ADD]](p0) :: (store 16 + 16)
346+
; CHECK: G_STORE [[BUILD_VECTOR1]](<8 x s16>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
347347
; CHECK: RET_ReallyLR
348348
%val:_(<16 x s16>) = G_IMPLICIT_DEF
349349
%ptr:_(p0) = COPY $x0
@@ -367,7 +367,7 @@ body: |
367367
; CHECK: G_STORE [[BUILD_VECTOR]](<4 x s32>), %ptr(p0) :: (store 16, align 32)
368368
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
369369
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
370-
; CHECK: G_STORE [[BUILD_VECTOR1]](<4 x s32>), [[PTR_ADD]](p0) :: (store 16 + 16)
370+
; CHECK: G_STORE [[BUILD_VECTOR1]](<4 x s32>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
371371
; CHECK: RET_ReallyLR
372372
%val:_(<8 x s32>) = G_IMPLICIT_DEF
373373
%ptr:_(p0) = COPY $x0
@@ -389,7 +389,7 @@ body: |
389389
; CHECK: G_STORE [[DEF]](<2 x s64>), %ptr(p0) :: (store 16, align 32)
390390
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
391391
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
392-
; CHECK: G_STORE [[DEF]](<2 x s64>), [[PTR_ADD]](p0) :: (store 16 + 16)
392+
; CHECK: G_STORE [[DEF]](<2 x s64>), [[PTR_ADD]](p0) :: (store 16 into undef + 16)
393393
; CHECK: RET_ReallyLR
394394
%val:_(<4 x s64>) = G_IMPLICIT_DEF
395395
%ptr:_(p0) = COPY $x0
@@ -410,10 +410,10 @@ body: |
410410
; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD %ptr(p0) :: (load 16, align 32)
411411
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
412412
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
413-
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 + 16)
413+
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 from undef + 16)
414414
; CHECK: G_STORE [[LOAD]](<16 x s8>), %ptr(p0) :: (store 16, align 32)
415415
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
416-
; CHECK: G_STORE [[LOAD1]](<16 x s8>), [[PTR_ADD1]](p0) :: (store 16 + 16)
416+
; CHECK: G_STORE [[LOAD1]](<16 x s8>), [[PTR_ADD1]](p0) :: (store 16 into undef + 16)
417417
; CHECK: RET_ReallyLR
418418
%ptr:_(p0) = COPY $x0
419419
%val:_(<32 x s8>) = G_LOAD %ptr(p0) :: (load 32)
@@ -434,10 +434,10 @@ body: |
434434
; CHECK: [[LOAD:%[0-9]+]]:_(<8 x s16>) = G_LOAD %ptr(p0) :: (load 16, align 32)
435435
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
436436
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
437-
; CHECK: [[LOAD1:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 + 16)
437+
; CHECK: [[LOAD1:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 from undef + 16)
438438
; CHECK: G_STORE [[LOAD]](<8 x s16>), %ptr(p0) :: (store 16, align 32)
439439
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
440-
; CHECK: G_STORE [[LOAD1]](<8 x s16>), [[PTR_ADD1]](p0) :: (store 16 + 16)
440+
; CHECK: G_STORE [[LOAD1]](<8 x s16>), [[PTR_ADD1]](p0) :: (store 16 into undef + 16)
441441
; CHECK: RET_ReallyLR
442442
%ptr:_(p0) = COPY $x0
443443
%val:_(<16 x s16>) = G_LOAD %ptr(p0) :: (load 32)
@@ -458,10 +458,10 @@ body: |
458458
; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load 16, align 32)
459459
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
460460
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
461-
; CHECK: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 + 16)
461+
; CHECK: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 from undef + 16)
462462
; CHECK: G_STORE [[LOAD]](<4 x s32>), %ptr(p0) :: (store 16, align 32)
463463
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
464-
; CHECK: G_STORE [[LOAD1]](<4 x s32>), [[PTR_ADD1]](p0) :: (store 16 + 16)
464+
; CHECK: G_STORE [[LOAD1]](<4 x s32>), [[PTR_ADD1]](p0) :: (store 16 into undef + 16)
465465
; CHECK: RET_ReallyLR
466466
%ptr:_(p0) = COPY $x0
467467
%val:_(<8 x s32>) = G_LOAD %ptr(p0) :: (load 32)
@@ -482,10 +482,10 @@ body: |
482482
; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD %ptr(p0) :: (load 16, align 32)
483483
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
484484
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
485-
; CHECK: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 + 16)
485+
; CHECK: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p0) :: (load 16 from undef + 16)
486486
; CHECK: G_STORE [[LOAD]](<2 x s64>), %ptr(p0) :: (store 16, align 32)
487487
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C]](s64)
488-
; CHECK: G_STORE [[LOAD1]](<2 x s64>), [[PTR_ADD1]](p0) :: (store 16 + 16)
488+
; CHECK: G_STORE [[LOAD1]](<2 x s64>), [[PTR_ADD1]](p0) :: (store 16 into undef + 16)
489489
; CHECK: RET_ReallyLR
490490
%ptr:_(p0) = COPY $x0
491491
%val:_(<4 x s64>) = G_LOAD %ptr(p0) :: (load 32)

‎llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1401,13 +1401,13 @@ body: |
14011401
; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load 64, align 4, addrspace 4)
14021402
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
14031403
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64)
1404-
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 + 64, align 4, addrspace 4)
1404+
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 from undef + 64, align 4, addrspace 4)
14051405
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
14061406
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
1407-
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 + 128, align 4, addrspace 4)
1407+
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 from undef + 128, align 4, addrspace 4)
14081408
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
14091409
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
1410-
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
1410+
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 from undef + 192, align 4, addrspace 4)
14111411
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[LOAD]](<16 x s32>), 224
14121412
; CHECK: S_ENDPGM 0, implicit [[EXTRACT]](s32)
14131413
%0:_(p1) = COPY $sgpr0_sgpr1
@@ -1429,13 +1429,13 @@ body: |
14291429
; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load 64, align 4, addrspace 4)
14301430
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
14311431
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64)
1432-
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 + 64, align 4, addrspace 4)
1432+
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 from undef + 64, align 4, addrspace 4)
14331433
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
14341434
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
1435-
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 + 128, align 4, addrspace 4)
1435+
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 from undef + 128, align 4, addrspace 4)
14361436
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
14371437
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
1438-
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
1438+
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 from undef + 192, align 4, addrspace 4)
14391439
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[LOAD2]](<16 x s32>), 32
14401440
; CHECK: S_ENDPGM 0, implicit [[EXTRACT]](s32)
14411441
%0:_(p1) = COPY $sgpr0_sgpr1
@@ -1480,15 +1480,15 @@ body: |
14801480
; CHECK: [[BITCAST:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD]](<16 x s32>)
14811481
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
14821482
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64)
1483-
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 + 64, align 4, addrspace 4)
1483+
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 from undef + 64, align 4, addrspace 4)
14841484
; CHECK: [[BITCAST1:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD1]](<16 x s32>)
14851485
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
14861486
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
1487-
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 + 128, align 4, addrspace 4)
1487+
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 from undef + 128, align 4, addrspace 4)
14881488
; CHECK: [[BITCAST2:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD2]](<16 x s32>)
14891489
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
14901490
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
1491-
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
1491+
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 from undef + 192, align 4, addrspace 4)
14921492
; CHECK: [[BITCAST3:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD3]](<16 x s32>)
14931493
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
14941494
; CHECK: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3), [[UV2:%[0-9]+]]:_(p3), [[UV3:%[0-9]+]]:_(p3), [[UV4:%[0-9]+]]:_(p3), [[UV5:%[0-9]+]]:_(p3), [[UV6:%[0-9]+]]:_(p3), [[UV7:%[0-9]+]]:_(p3), [[UV8:%[0-9]+]]:_(p3), [[UV9:%[0-9]+]]:_(p3), [[UV10:%[0-9]+]]:_(p3), [[UV11:%[0-9]+]]:_(p3), [[UV12:%[0-9]+]]:_(p3), [[UV13:%[0-9]+]]:_(p3), [[UV14:%[0-9]+]]:_(p3), [[UV15:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[BITCAST]](<16 x p3>)
@@ -1708,13 +1708,13 @@ body: |
17081708
; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load 64, align 4, addrspace 4)
17091709
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
17101710
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64)
1711-
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 + 64, align 4, addrspace 4)
1711+
; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 from undef + 64, align 4, addrspace 4)
17121712
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
17131713
; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
1714-
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 + 128, align 4, addrspace 4)
1714+
; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 from undef + 128, align 4, addrspace 4)
17151715
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
17161716
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
1717-
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
1717+
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 from undef + 192, align 4, addrspace 4)
17181718
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
17191719
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)
17201720
; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)

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