Improve handling of unreachable blocks in mem2reg.

We were handling regular uses, but not handling promotions in things
like debug_value_addr.

This was exposed by some pass ordering changes I have in an upcoming
commit.

Author: rudkx

lib/SILOptimizer/Transforms/SILMem2Reg.cpp

@@ -568,7 +568,8 @@ StackAllocationPromoter::getLiveInValue(BlockSet &PhiBlocks,
     return BB->getBBArg(BB->getNumBBArg()-1);
   }
 
-  assert(DT->getNode(BB) && "Block is not in dominator tree!");
+  if (BB->pred_empty() || !DT->getNode(BB))
+    return SILUndef::get(ASI->getElementType(), ASI->getModule());
 
   // No phi for this value in this block means that the value flowing
   // out of the immediate dominator reaches here.
@@ -610,14 +611,10 @@ void StackAllocationPromoter::fixBranchesAndUses(BlockSet &PhiBlocks) {
       // examining is a value, replace it with undef. Either way, delete
       // the instruction and move on.
       SILBasicBlock *BB = LI->getParent();
-      if (BB->pred_empty() || !DT->getNode(BB)) {
-        Def = SILUndef::get(ASI->getElementType(), ASI->getModule());
-      } else {
-        Def = getLiveInValue(PhiBlocks, BB);
-      }
-      
+      Def = getLiveInValue(PhiBlocks, BB);
+
       DEBUG(llvm::dbgs() << "*** Replacing " << *LI << " with Def " << *Def);
-        
+
       // Replace the load with the definition that we found.
       replaceLoad(LI, Def, ASI);
       removedUser = true;

test/SILOptimizer/mem2reg_unreachable.sil

@@ -37,3 +37,22 @@ bb3:                                              // Preds: bb1 bb2
   return %20 : $Int32                             // id: %22
 }
 
+struct S {}
+
+sil hidden @handle_unreachable : $@convention(thin) () -> () {
+bb0:
+  %0 = alloc_stack $S, var, name "x"
+  %1 = struct $S ()
+  store %1 to %0 : $*S
+  unreachable
+
+bb1:
+  debug_value_addr %0 : $*S, let, name "newvalue", argno 1
+  br bb2
+
+bb2:
+  %3 = load %0 : $*S
+  dealloc_stack %0 : $*S
+  %4 = tuple ()
+  return %4 : $()
+}