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[sil] Fix a bug that I found on inspection.
rdar://29791263
1 parent 1a0a32d commit c309a28

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include/swift/SIL/SILInstruction.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4889,7 +4889,7 @@ class CondBranchInst : public TermInst {
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auto Operands = getTrueOperands();
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return Operands.front().getOperandNumber() <= OpIndex &&
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Operands.back().getOperandNumber() <= OpIndex;
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OpIndex <= Operands.back().getOperandNumber();
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}
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/// Is \p OpIndex an operand associated with the false case?
@@ -4901,7 +4901,7 @@ class CondBranchInst : public TermInst {
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auto Operands = getFalseOperands();
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return Operands.front().getOperandNumber() <= OpIndex &&
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Operands.back().getOperandNumber() <= OpIndex;
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OpIndex <= Operands.back().getOperandNumber();
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}
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/// Returns the argument on the cond_br terminator that will be passed to

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