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1 | 1 | // RUN: %target-sil-opt -enable-sil-verify-all %s -inline -sil-print-debuginfo | %FileCheck %s
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2 | 2 |
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3 | 3 | // Generated from:
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4 |
| -// func g(_ x: Int) -> Int { |
| 4 | +// func g(_ x: Int64) -> Int64 { |
5 | 5 | // if (x > 0) {
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6 | 6 | // return 1
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7 | 7 | // }
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8 | 8 | // return 0
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9 | 9 | // }
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10 | 10 | //
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11 |
| -// public func f(_ x: Int) -> Int { return g(x) } |
| 11 | +// public func f(_ x: Int64) -> Int64 { return g(x) } |
12 | 12 |
|
13 |
| -// CHECK: sil @$s1a1fyS2iF : $@convention(thin) (Int) -> Int { |
14 |
| -// CHECK: bb0(%0 : $Int): |
| 13 | +// CHECK: sil @$s1a1gys5Int64VADF : $@convention(thin) (Int64) -> Int64 { |
| 14 | +// CHECK: bb0(%0 : $Int64): |
15 | 15 | // CHECK-NEXT: scope [[SCOPE_10:[0-9]+]]
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16 |
| -// CHECK: cond_br {{.*}}, bb1, bb2, loc "t.swift":3:9, scope [[SCOPE_10]] |
| 16 | +// CHECK: cond_br {{.*}}, bb1, bb2, loc "t.swift":2:9, scope [[SCOPE_10]] |
17 | 17 | // CHECK: bb1:
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18 | 18 | // CHECK-NEXT: scope [[SCOPE_11:[0-9]+]]
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19 |
| -// CHECK: br bb3({{.*}} : $Int), loc "t.swift":4:5, scope [[SCOPE_11]] |
| 19 | +// CHECK: br bb3({{.*}} : $Int64), loc "t.swift":3:5, scope [[SCOPE_11]] |
20 | 20 | // CHECK: bb2:
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21 | 21 | // CHECK-NEXT: scope [[SCOPE_9:[0-9]+]]
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22 |
| -// CHECK: br bb3({{.*}} : $Int), loc "t.swift":6:3, scope [[SCOPE_9]] |
23 |
| -// CHECK: bb3({{.*}} : $Int): |
| 22 | +// CHECK: br bb3({{.*}} : $Int64), loc "t.swift":5:3, scope [[SCOPE_9]] |
| 23 | +// CHECK: bb3({{.*}} : $Int64): |
24 | 24 |
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25 | 25 | sil_stage canonical
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26 | 26 |
|
27 | 27 | import Builtin
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28 | 28 | import Swift
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29 | 29 | import SwiftShims
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30 | 30 |
|
31 |
| -func g(_ x: Int) -> Int |
| 31 | +func g(_ x: Int64) -> Int64 |
32 | 32 |
|
33 |
| -public func f(_ x: Int) -> Int |
| 33 | +public func f(_ x: Int64) -> Int64 |
34 | 34 |
|
35 |
| -sil_scope 1 { loc "t.swift":2:6 parent @$s1a1gyS2iF : $@convention(thin) (Int) -> Int } |
36 |
| -sil_scope 2 { loc "t.swift":2:25 parent 1 } |
37 |
| -sil_scope 3 { loc "t.swift":3:3 parent 2 } |
38 |
| -sil_scope 4 { loc "t.swift":3:14 parent 3 } |
| 35 | +sil_scope 1 { loc "t.swift":1:6 parent @$s1a1gys5Int64VADF : $@convention(thin) (Int64) -> Int64 } |
| 36 | +sil_scope 2 { loc "t.swift":1:29 parent 1 } |
| 37 | +sil_scope 3 { loc "t.swift":2:3 parent 2 } |
| 38 | +sil_scope 4 { loc "t.swift":2:14 parent 3 } |
39 | 39 |
|
40 | 40 | // g(_:)
|
41 |
| -sil hidden @$s1a1gyS2iF : $@convention(thin) (Int) -> Int { |
| 41 | +sil @$s1a1gys5Int64VADF : $@convention(thin) (Int64) -> Int64 { |
42 | 42 | // %0 "x" // users: %3, %1
|
43 |
| -bb0(%0 : $Int): |
44 |
| - %2 = integer_literal $Builtin.Int64, 0, loc "t.swift":3:11, scope 3 // user: %4 |
45 |
| - %3 = struct_extract %0 : $Int, #Int._value, loc "t.swift":3:9, scope 3 // user: %4 |
46 |
| - %4 = builtin "cmp_slt_Int64"(%2 : $Builtin.Int64, %3 : $Builtin.Int64) : $Builtin.Int1, loc "t.swift":3:9, scope 3 // user: %5 |
47 |
| - cond_br %4, bb1, bb2, loc "t.swift":3:9, scope 3 // id: %5 |
| 43 | +bb0(%0 : $Int64): |
| 44 | + %2 = integer_literal $Builtin.Int64, 0, loc "t.swift":2:11, scope 3 // user: %4 |
| 45 | + %3 = struct_extract %0 : $Int64, #Int64._value, loc "t.swift":2:9, scope 3 // user: %4 |
| 46 | + %4 = builtin "cmp_slt_Int64"(%2 : $Builtin.Int64, %3 : $Builtin.Int64) : $Builtin.Int1, loc "t.swift":2:9, scope 3 // user: %5 |
| 47 | + cond_br %4, bb1, bb2, loc "t.swift":2:9, scope 3 // id: %5 |
48 | 48 |
|
49 | 49 | bb1: // Preds: bb0
|
50 |
| - %6 = integer_literal $Builtin.Int64, 1, loc "t.swift":4:12, scope 4 // user: %7 |
51 |
| - %7 = struct $Int (%6 : $Builtin.Int64), loc "t.swift":4:12, scope 4 // user: %8 |
52 |
| - br bb3(%7 : $Int), loc "t.swift":4:5, scope 4 // id: %8 |
| 50 | + %6 = integer_literal $Builtin.Int64, 1, loc "t.swift":3:12, scope 4 // user: %7 |
| 51 | + %7 = struct $Int64 (%6 : $Builtin.Int64), loc "t.swift":3:12, scope 4 // user: %8 |
| 52 | + br bb3(%7 : $Int64), loc "t.swift":3:5, scope 4 // id: %8 |
53 | 53 |
|
54 | 54 | bb2: // Preds: bb0
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55 |
| - %9 = integer_literal $Builtin.Int64, 0, loc "t.swift":6:10, scope 2 // user: %10 |
56 |
| - %10 = struct $Int (%9 : $Builtin.Int64), loc "t.swift":6:10, scope 2 // user: %11 |
57 |
| - br bb3(%10 : $Int), loc "t.swift":6:3, scope 2 // id: %11 |
| 55 | + %9 = integer_literal $Builtin.Int64, 0, loc "t.swift":5:10, scope 2 // user: %10 |
| 56 | + %10 = struct $Int64 (%9 : $Builtin.Int64), loc "t.swift":5:10, scope 2 // user: %11 |
| 57 | + br bb3(%10 : $Int64), loc "t.swift":5:3, scope 2 // id: %11 |
58 | 58 |
|
59 | 59 | // %12 // user: %13
|
60 |
| -bb3(%12 : $Int): // Preds: bb2 bb1 |
61 |
| - return %12 : $Int, loc "t.swift":7:1, scope 2 // id: %13 |
62 |
| -} // end sil function '$s1a1gyS2iF' |
| 60 | +bb3(%12 : $Int64): // Preds: bb2 bb1 |
| 61 | + return %12 : $Int64, loc "t.swift":6:1, scope 2 // id: %13 |
| 62 | +} // end sil function '$s1a1gys5Int64VADF' |
63 | 63 |
|
64 |
| -sil_scope 7 { loc "t.swift":9:13 parent @$s1a1fyS2iF : $@convention(thin) (Int) -> Int } |
65 |
| -sil_scope 8 { loc "t.swift":9:32 parent 7 } |
| 64 | +sil_scope 7 { loc "t.swift":8:13 parent @$s1a1fys5Int64VADF : $@convention(thin) (Int64) -> Int64 } |
| 65 | +sil_scope 8 { loc "t.swift":8:36 parent 7 } |
66 | 66 |
|
67 | 67 | // f(_:)
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68 |
| -sil @$s1a1fyS2iF : $@convention(thin) (Int) -> Int { |
| 68 | +sil @$s1a1fys5Int64VADF : $@convention(thin) (Int64) -> Int64 { |
69 | 69 | // %0 "x" // users: %3, %1
|
70 |
| -bb0(%0 : $Int): |
| 70 | +bb0(%0 : $Int64): |
71 | 71 | // function_ref g(_:)
|
72 |
| - %2 = function_ref @$s1a1gyS2iF : $@convention(thin) (Int) -> Int, loc "t.swift":9:41, scope 8 // user: %3 |
73 |
| - %3 = apply %2(%0) : $@convention(thin) (Int) -> Int, loc "t.swift":9:41, scope 8 // user: %4 |
74 |
| - return %3 : $Int, loc "t.swift":9:34, scope 8 // id: %4 |
75 |
| -} // end sil function '$s1a1fyS2iF' |
| 72 | + %2 = function_ref @$s1a1gys5Int64VADF : $@convention(thin) (Int64) -> Int64, loc "t.swift":8:45, scope 8 // user: %3 |
| 73 | + %3 = apply %2(%0) : $@convention(thin) (Int64) -> Int64, loc "t.swift":8:45, scope 8 // user: %4 |
| 74 | + return %3 : $Int64, loc "t.swift":8:38, scope 8 // id: %4 |
| 75 | +} // end sil function '$s1a1fys5Int64VADF' |
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