@@ -62,7 +62,7 @@ NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
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case llvm::Triple::aarch64: {
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// Configure register sets supported by this AArch64 target.
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// Read SVE header to check for SVE support.
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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struct user_sve_header sve_header;
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#else
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struct user_sve_header sve_header {};
@@ -211,7 +211,7 @@ NativeRegisterContextLinux_arm64::ReadRegister(const RegisterInfo *reg_info,
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if (reg == GetRegisterInfo ().GetRegNumFPSR ()) {
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sve_reg_num = reg;
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if (m_sve_state == SVEState::Full)
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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offset = sve::PTraceFPSROffset (sve::vq_from_vl (m_sve_header.vl ));
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#else
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offset = 0 ;
@@ -221,7 +221,7 @@ NativeRegisterContextLinux_arm64::ReadRegister(const RegisterInfo *reg_info,
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} else if (reg == GetRegisterInfo ().GetRegNumFPCR ()) {
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sve_reg_num = reg;
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if (m_sve_state == SVEState::Full)
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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offset = sve::PTraceFPCROffset (sve::vq_from_vl (m_sve_header.vl ));
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#else
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offset = 0 ;
@@ -353,7 +353,7 @@ Status NativeRegisterContextLinux_arm64::WriteRegister(
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if (reg == GetRegisterInfo ().GetRegNumFPSR ()) {
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sve_reg_num = reg;
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if (m_sve_state == SVEState::Full)
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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offset = sve::PTraceFPSROffset (sve::vq_from_vl (m_sve_header.vl ));
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#else
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offset = 0 ;
@@ -363,7 +363,7 @@ Status NativeRegisterContextLinux_arm64::WriteRegister(
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} else if (reg == GetRegisterInfo ().GetRegNumFPCR ()) {
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sve_reg_num = reg;
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if (m_sve_state == SVEState::Full)
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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offset = sve::PTraceFPCROffset (sve::vq_from_vl (m_sve_header.vl ));
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#else
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offset = 0 ;
@@ -844,7 +844,7 @@ void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() {
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if (error.Success ()) {
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// If SVE is enabled thread can switch between SVEState::FPSIMD and
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// SVEState::Full on every stop.
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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if ((m_sve_header.flags & sve::ptrace_regs_mask) ==
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sve::ptrace_regs_fpsimd)
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m_sve_state = SVEState::FPSIMD;
@@ -856,7 +856,7 @@ void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() {
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// On every stop we configure SVE vector length by calling
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// ConfigureVectorLength regardless of current SVEState of this thread.
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uint32_t vq = RegisterInfoPOSIX_arm64::eVectorQuadwordAArch64SVE;
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- #ifdef LLDB_HAVE_USER_SVE_HEADER
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+ #if LLDB_HAVE_USER_SVE_HEADER
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if (sve_vl_valid (m_sve_header.vl ))
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vq = sve::vq_from_vl (m_sve_header.vl );
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#endif
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