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Remove "StartElem" from perform{SIL,IR}Generation
This was only used by the integrated REPL, and is now a dead option. The "StartElem" option for performTypeChecking is still used for reading SIL files, which have AST and SIL blocks alternate.
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8 files changed

+30
-51
lines changed

8 files changed

+30
-51
lines changed

include/swift/SIL/SILModule.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -343,10 +343,9 @@ class SILModule {
343343
/// should contain source files.
344344
///
345345
/// If a source file is provided, SIL will only be emitted for decls in that
346-
/// source file, starting from the specified element number.
346+
/// source file.
347347
static std::unique_ptr<SILModule>
348348
constructSIL(ModuleDecl *M, SILOptions &Options, FileUnit *sf = nullptr,
349-
Optional<unsigned> startElem = None,
350349
bool isWholeModule = false);
351350

352351
/// \brief Create and return an empty SIL module that we can

include/swift/Subsystems.h

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -246,12 +246,8 @@ namespace swift {
246246
bool wholeModuleCompilation = false);
247247

248248
/// Turn a source file into SIL IR.
249-
///
250-
/// If \p StartElem is provided, the module is assumed to be only part of the
251-
/// SourceFile, and any optimizations should take that into account.
252249
std::unique_ptr<SILModule>
253-
performSILGeneration(FileUnit &SF, SILOptions &options,
254-
Optional<unsigned> StartElem = None);
250+
performSILGeneration(FileUnit &SF, SILOptions &options);
255251

256252
using ModuleOrSourceFile = PointerUnion<ModuleDecl *, SourceFile *>;
257253

@@ -283,7 +279,6 @@ namespace swift {
283279
std::unique_ptr<SILModule> SILMod,
284280
StringRef ModuleName, const PrimarySpecificPaths &PSPs,
285281
llvm::LLVMContext &LLVMContext,
286-
unsigned StartElem = 0,
287282
llvm::GlobalVariable **outModuleHash = nullptr);
288283

289284
/// Given an already created LLVM module, construct a pass pipeline and run

lib/FrontendTool/FrontendTool.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -832,7 +832,7 @@ generateSILModules(CompilerInvocation &Invocation, CompilerInstance &Instance) {
832832
// once for each such input.
833833
std::deque<PostSILGenInputs> PSGIs;
834834
for (auto *PrimaryFile : Instance.getPrimarySourceFiles()) {
835-
auto SM = performSILGeneration(*PrimaryFile, SILOpts, None);
835+
auto SM = performSILGeneration(*PrimaryFile, SILOpts);
836836
const PrimarySpecificPaths PSPs =
837837
Instance.getPrimarySpecificPathsForSourceFile(*PrimaryFile);
838838
PSGIs.push_back(PostSILGenInputs{std::move(SM), true, PrimaryFile, PSPs});
@@ -846,7 +846,7 @@ generateSILModules(CompilerInvocation &Invocation, CompilerInstance &Instance) {
846846
if (Invocation.getFrontendOptions().InputsAndOutputs.isInputPrimary(
847847
SASTF->getFilename())) {
848848
assert(PSGIs.empty() && "Can only handle one primary AST input");
849-
auto SM = performSILGeneration(*SASTF, SILOpts, None);
849+
auto SM = performSILGeneration(*SASTF, SILOpts);
850850
const PrimarySpecificPaths &PSPs =
851851
Instance.getPrimarySpecificPathsForPrimary(SASTF->getFilename());
852852
PSGIs.push_back(
@@ -1130,7 +1130,7 @@ static void generateIR(IRGenOptions &IRGenOpts, std::unique_ptr<SILModule> SM,
11301130
IRModule = MSF.is<SourceFile *>()
11311131
? performIRGeneration(IRGenOpts, *MSF.get<SourceFile *>(),
11321132
std::move(SM), OutputFilename, PSPs,
1133-
LLVMContext, 0, &HashGlobal)
1133+
LLVMContext, &HashGlobal)
11341134
: performIRGeneration(IRGenOpts, MSF.get<ModuleDecl *>(),
11351135
std::move(SM), OutputFilename, PSPs,
11361136
LLVMContext, parallelOutputFilenames,

lib/IRGen/GenDecl.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -467,13 +467,13 @@ class PrettySourceFileEmission : public llvm::PrettyStackTraceEntry {
467467
} // end anonymous namespace
468468

469469
/// Emit all the top-level code in the source file.
470-
void IRGenModule::emitSourceFile(SourceFile &SF, unsigned StartElem) {
470+
void IRGenModule::emitSourceFile(SourceFile &SF) {
471471
PrettySourceFileEmission StackEntry(SF);
472472
llvm::SaveAndRestore<SourceFile *> SetCurSourceFile(CurSourceFile, &SF);
473473

474474
// Emit types and other global decls.
475-
for (unsigned i = StartElem, e = SF.Decls.size(); i != e; ++i)
476-
emitGlobalDecl(SF.Decls[i]);
475+
for (auto *decl : SF.Decls)
476+
emitGlobalDecl(decl);
477477
for (auto *localDecl : SF.LocalTypeDecls)
478478
emitGlobalDecl(localDecl);
479479

lib/IRGen/IRGen.cpp

Lines changed: 12 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -762,15 +762,12 @@ static void runIRGenPreparePasses(SILModule &Module,
762762

763763
/// Generates LLVM IR, runs the LLVM passes and produces the output file.
764764
/// All this is done in a single thread.
765-
static std::unique_ptr<llvm::Module> performIRGeneration(IRGenOptions &Opts,
766-
swift::ModuleDecl *M,
767-
std::unique_ptr<SILModule> SILMod,
768-
StringRef ModuleName,
769-
const PrimarySpecificPaths &PSPs,
770-
llvm::LLVMContext &LLVMContext,
771-
SourceFile *SF = nullptr,
772-
llvm::GlobalVariable **outModuleHash = nullptr,
773-
unsigned StartElem = 0) {
765+
static std::unique_ptr<llvm::Module>
766+
performIRGeneration(IRGenOptions &Opts, ModuleDecl *M,
767+
std::unique_ptr<SILModule> SILMod, StringRef ModuleName,
768+
const PrimarySpecificPaths &PSPs,
769+
llvm::LLVMContext &LLVMContext, SourceFile *SF = nullptr,
770+
llvm::GlobalVariable **outModuleHash = nullptr) {
774771
auto &Ctx = M->getASTContext();
775772
assert(!Ctx.hadError());
776773

@@ -795,13 +792,12 @@ static std::unique_ptr<llvm::Module> performIRGeneration(IRGenOptions &Opts,
795792
irgen.emitGlobalTopLevel();
796793

797794
if (SF) {
798-
IGM.emitSourceFile(*SF, StartElem);
795+
IGM.emitSourceFile(*SF);
799796
} else {
800-
assert(StartElem == 0 && "no explicit source file provided");
801797
for (auto *File : M->getFiles()) {
802798
if (auto *nextSF = dyn_cast<SourceFile>(File)) {
803799
if (nextSF->ASTStage >= SourceFile::TypeChecked)
804-
IGM.emitSourceFile(*nextSF, 0);
800+
IGM.emitSourceFile(*nextSF);
805801
} else {
806802
File->collectLinkLibraries([&IGM](LinkLibrary LinkLib) {
807803
IGM.addLinkLibrary(LinkLib);
@@ -972,7 +968,7 @@ static void performParallelIRGeneration(
972968
for (auto *File : M->getFiles()) {
973969
if (auto *SF = dyn_cast<SourceFile>(File)) {
974970
IRGenModule *IGM = irgen.getGenModule(SF);
975-
IGM->emitSourceFile(*SF, 0);
971+
IGM->emitSourceFile(*SF);
976972
} else {
977973
File->collectLinkLibraries([&](LinkLibrary LinkLib) {
978974
irgen.getPrimaryIGM()->addLinkLibrary(LinkLib);
@@ -1116,12 +1112,10 @@ performIRGeneration(IRGenOptions &Opts, SourceFile &SF,
11161112
std::unique_ptr<SILModule> SILMod,
11171113
StringRef ModuleName, const PrimarySpecificPaths &PSPs,
11181114
llvm::LLVMContext &LLVMContext,
1119-
unsigned StartElem,
11201115
llvm::GlobalVariable **outModuleHash) {
1121-
return ::performIRGeneration(Opts, SF.getParentModule(),
1122-
std::move(SILMod), ModuleName,
1123-
PSPs,
1124-
LLVMContext, &SF, outModuleHash, StartElem);
1116+
return ::performIRGeneration(Opts, SF.getParentModule(), std::move(SILMod),
1117+
ModuleName, PSPs, LLVMContext, &SF,
1118+
outModuleHash);
11251119
}
11261120

11271121
void

lib/IRGen/IRGenModule.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1095,7 +1095,7 @@ private: \
10951095

10961096
llvm::LLVMContext &getLLVMContext() const { return LLVMContext; }
10971097

1098-
void emitSourceFile(SourceFile &SF, unsigned StartElem);
1098+
void emitSourceFile(SourceFile &SF);
10991099
void addLinkLibrary(const LinkLibrary &linkLib);
11001100

11011101
/// Attempt to finalize the module.

lib/SILGen/SILGen.cpp

Lines changed: 8 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1579,10 +1579,10 @@ class SourceFileScope {
15791579

15801580
} // end anonymous namespace
15811581

1582-
void SILGenModule::emitSourceFile(SourceFile *sf, unsigned startElem) {
1582+
void SILGenModule::emitSourceFile(SourceFile *sf) {
15831583
SourceFileScope scope(*this, sf);
15841584
FrontendStatsTracer StatsTracer(getASTContext().Stats, "SILgen-file", sf);
1585-
for (Decl *D : llvm::makeArrayRef(sf->Decls).slice(startElem)) {
1585+
for (Decl *D : sf->Decls) {
15861586
FrontendStatsTracer StatsTracer(getASTContext().Stats, "SILgen-decl", D);
15871587
visit(D);
15881588
}
@@ -1603,16 +1603,10 @@ void SILGenModule::emitSourceFile(SourceFile *sf, unsigned startElem) {
16031603

16041604
std::unique_ptr<SILModule>
16051605
SILModule::constructSIL(ModuleDecl *mod, SILOptions &options, FileUnit *SF,
1606-
Optional<unsigned> startElem,
16071606
bool isWholeModule) {
16081607
SharedTimer timer("SILGen");
16091608
const DeclContext *DC;
1610-
if (startElem) {
1611-
assert(SF && "cannot have a start element without a source file");
1612-
// Because more decls may be added to the SourceFile, we can't assume
1613-
// anything about the compilation context.
1614-
DC = nullptr;
1615-
} else if (SF) {
1609+
if (SF) {
16161610
DC = SF;
16171611
} else {
16181612
DC = mod;
@@ -1624,7 +1618,7 @@ SILModule::constructSIL(ModuleDecl *mod, SILOptions &options, FileUnit *SF,
16241618

16251619
if (SF) {
16261620
if (auto *file = dyn_cast<SourceFile>(SF)) {
1627-
SGM.emitSourceFile(file, startElem.getValueOr(0));
1621+
SGM.emitSourceFile(file);
16281622
} else if (auto *file = dyn_cast<SerializedASTFile>(SF)) {
16291623
if (file->isSIB())
16301624
M->getSILLoader()->getAllForModule(mod->getName(), file);
@@ -1634,7 +1628,7 @@ SILModule::constructSIL(ModuleDecl *mod, SILOptions &options, FileUnit *SF,
16341628
auto nextSF = dyn_cast<SourceFile>(file);
16351629
if (!nextSF || nextSF->ASTStage != SourceFile::TypeChecked)
16361630
continue;
1637-
SGM.emitSourceFile(nextSF, 0);
1631+
SGM.emitSourceFile(nextSF);
16381632
}
16391633

16401634
// Also make sure to process any intermediate files that may contain SIL
@@ -1679,13 +1673,10 @@ std::unique_ptr<SILModule>
16791673
swift::performSILGeneration(ModuleDecl *mod,
16801674
SILOptions &options,
16811675
bool wholeModuleCompilation) {
1682-
return SILModule::constructSIL(mod, options, nullptr, None,
1683-
wholeModuleCompilation);
1676+
return SILModule::constructSIL(mod, options, nullptr, wholeModuleCompilation);
16841677
}
16851678

16861679
std::unique_ptr<SILModule>
1687-
swift::performSILGeneration(FileUnit &sf, SILOptions &options,
1688-
Optional<unsigned> startElem) {
1689-
return SILModule::constructSIL(sf.getParentModule(), options, &sf, startElem,
1690-
false);
1680+
swift::performSILGeneration(FileUnit &sf, SILOptions &options) {
1681+
return SILModule::constructSIL(sf.getParentModule(), options, &sf, false);
16911682
}

lib/SILGen/SILGen.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -222,7 +222,7 @@ class LLVM_LIBRARY_VISIBILITY SILGenModule : public ASTVisitor<SILGenModule> {
222222
void emitAbstractFuncDecl(AbstractFunctionDecl *AFD);
223223

224224
/// Generate code for a source file of the module.
225-
void emitSourceFile(SourceFile *sf, unsigned startElem);
225+
void emitSourceFile(SourceFile *sf);
226226

227227
/// Generates code for the given FuncDecl and adds the
228228
/// SILFunction to the current SILModule under the name SILDeclRef(decl). For

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