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IRGen: Move field type vector slot to appear before the address point
1 parent ed97617 commit df780c0

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7 files changed

+35
-36
lines changed

7 files changed

+35
-36
lines changed

‎lib/IRGen/GenMeta.cpp

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2633,11 +2633,14 @@ irgen::emitFieldTypeAccessor(IRGenModule &IGM,
26332633
// instantiated with every generic metadata instance.
26342634
} else {
26352635
auto size = IGM.getMetadataLayout(type).getSize();
2636-
Size offset = size.getOffsetToEnd();
2636+
auto index = -(size.AddressPoint.getValue() /
2637+
int64_t(IGM.getPointerSize().getValue())) - 1;
2638+
auto offset = IGM.getSize(Size(index));
2639+
26372640
vectorPtr = IGF.Builder.CreateBitCast(metadata,
26382641
metadataArrayPtrTy->getPointerTo());
2639-
vectorPtr = IGF.Builder.CreateConstInBoundsGEP1_32(
2640-
/*Ty=*/nullptr, vectorPtr, IGM.getOffsetInWords(offset));
2642+
vectorPtr = IGF.Builder.CreateInBoundsGEP(
2643+
/*Ty=*/nullptr, vectorPtr, offset);
26412644
}
26422645

26432646
// First, see if the field type vector has already been populated. This
@@ -2917,12 +2920,12 @@ namespace {
29172920
B.addPlaceholderWithSize(privateDataInit->getType());
29182921

29192922
asImpl().addDependentData();
2920-
2921-
// Lay out the template data.
2922-
super::layout();
29232923

29242924
// Save a slot for the field type vector address to be instantiated into.
29252925
asImpl().addFieldTypeVectorReferenceSlot();
2926+
2927+
// Lay out the template data.
2928+
super::layout();
29262929

29272930
// If we have a dependent value witness table, emit its template.
29282931
if (HasDependentVWT) {

‎test/IRGen/enum.sil

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2692,7 +2692,7 @@ entry(%x : $*MyOptional):
26922692
// CHECK: [[T1:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 2
26932693
// CHECK: [[T0:%.*]] = bitcast %swift.type* [[T]] to i8*
26942694
// CHECK: store i8* [[T0]], i8** [[T1]]
2695-
// CHECK: [[VWT:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 4
2695+
// CHECK: [[VWT:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 3
26962696
// CHECK: [[T0:%.*]] = bitcast i8** [[VWT]] to i8*
26972697
// CHECK: [[T1:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -1
26982698
// CHECK: store i8* [[T0]], i8** [[T1]]

‎test/IRGen/enum_value_semantics.sil

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,7 @@ enum GenericFixedLayout<T> {
156156

157157
// CHECK-LABEL: @_T020enum_value_semantics18GenericFixedLayoutOMP = internal global <{{[{].*\* [}]}}> <{
158158
// CHECK: %swift.type* (%swift.type_pattern*, i8**)* @create_generic_metadata_GenericFixedLayout
159-
// CHECK: i32 40, i16 1, i16 8,
159+
// CHECK: i32 40, i16 1, i16 16,
160160
// CHECK: [16 x i8*] zeroinitializer,
161161
// CHECK: i8** getelementptr inbounds ([18 x i8*], [18 x i8*]* @_T020enum_value_semantics18GenericFixedLayoutOWV, i32 0, i32 0),
162162
// CHECK: i64 2,

‎test/IRGen/field_type_vectors.sil

Lines changed: 16 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -13,19 +13,19 @@ struct Foo {
1313
// CHECK-LABEL: @_T018field_type_vectors3BarVMn = hidden constant
1414
// CHECK: %swift.type** (%swift.type*)* [[BAR_TYPES_ACCESSOR:@[A-Za-z0-9_]*]]
1515
// CHECK-LABEL: @_T018field_type_vectors3BarVMP = internal global
16-
// -- There should be 4 words between the address point and the field type
17-
// vector slot, with type %swift.type**
18-
// CHECK: i64, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i64, %swift.type*, %swift.type**
16+
// -- There should be 1 word between the field type vector slot, with type %swift.type**,
17+
// and the address point
18+
// CHECK: %swift.type**, i8**, i64, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i64, %swift.type*
1919
struct Bar<T> {
2020
var y: Int
2121
}
2222

2323
// CHECK-LABEL: @_T018field_type_vectors3BasVMn = hidden constant
2424
// CHECK: %swift.type** (%swift.type*)* [[BAS_TYPES_ACCESSOR:@[A-Za-z0-9_]*]]
2525
// CHECK-LABEL: @_T018field_type_vectors3BasVMP = internal global
26-
// -- There should be 6 words between the address point and the field type
27-
// vector slot, with type %swift.type**
28-
// CHECK: <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i64, i64, %swift.type*, %swift.type*, %swift.type**
26+
// -- There should be 1 word between the field type vector slot, with type %swift.type**,
27+
// and the address point
28+
// CHECK: %swift.type**, i8**, i64, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i64, i64, %swift.type*, %swift.type*
2929
struct Bas<T, U> {
3030
var foo: Foo
3131
var bar: Bar<T>
@@ -34,9 +34,9 @@ struct Bas<T, U> {
3434
// CHECK-LABEL: @_T018field_type_vectors3ZimCMn = hidden constant
3535
// CHECK: %swift.type** (%swift.type*)* [[ZIM_TYPES_ACCESSOR:@[A-Za-z0-9_]*]]
3636
// CHECK-LABEL: @_T018field_type_vectors3ZimCMP = internal global
37-
// -- There should be 14 words between the address point and the field type
38-
// vector slot, with type %swift.type**
39-
// CHECK: i64, %swift.type*, %swift.opaque*, %swift.opaque*, i64, i32, i32, i32, i16, i16, i32, i32, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i32, %swift.method_descriptor }>*, i8*, %swift.type*, %swift.type*, i8*, i64, i64, i64, %swift.type**
37+
// -- There should be 1 word between the field type vector slot, with type %swift.type**,
38+
// and the address point
39+
// CHECK: %swift.type**, i8*, i8**, i64, %swift.type*, %swift.opaque*, %swift.opaque*, i64, i32, i32, i32, i16, i16, i32, i32, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i32, %swift.method_descriptor }>*, i8*, %swift.type*, %swift.type*, i8*, i64, i64, i64
4040
class Zim<T, U> {
4141
var foo: Foo?
4242
var bar: Bar<T>?
@@ -49,9 +49,9 @@ sil @_TFC18field_type_vectors3ZimcU___fMGS0_Q_Q0__FT_GS0_Q_Q0__ : $@convention(m
4949
// CHECK-LABEL: @_T018field_type_vectors4ZangCMn = hidden constant
5050
// CHECK: %swift.type** (%swift.type*)* [[ZANG_TYPES_ACCESSOR:@[A-Za-z0-9_]*]]
5151
// CHECK-LABEL: @_T018field_type_vectors4ZangCMP = internal global
52-
// -- There should be 16 words between the address point and the field type
53-
// vector slot, with type %swift.type**
54-
// CHECK: i64, %swift.type*, %swift.opaque*, %swift.opaque*, i64, i32, i32, i32, i16, i16, i32, i32, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i8*, %swift.type*, %swift.type*, i8*, i64, i64, i64, %swift.type*, i64, %swift.type**
52+
// -- There should be 1 word between the field type vector slot, with type %swift.type**,
53+
// and the address point
54+
// CHECK: %swift.type**, i8*, i8**, i64, %swift.type*, %swift.opaque*, %swift.opaque*, i64, i32, i32, i32, i16, i16, i32, i32, <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32 }>*, i8*, %swift.type*, %swift.type*, i8*, i64, i64, i64, %swift.type*, i64
5555
class Zang<V>: Zim<V, V> {
5656
var zung: Int = 0
5757
}
@@ -83,8 +83,7 @@ sil_vtable StorageQualified {}
8383

8484
// CHECK: define{{( protected)?}} private %swift.type** [[BAR_TYPES_ACCESSOR]](%swift.type* %"Bar<T>")
8585
// CHECK: [[T0:%.*]] = bitcast %swift.type* %"Bar<T>" to %swift.type***
86-
// -- 4 words between the address point and the slot
87-
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i32 4
86+
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i64 -2
8887
// CHECK: load %swift.type**, %swift.type*** [[SLOT]], align 8
8988
// CHECK: br
9089
// CHECK-NOT: load %swift.type*,
@@ -93,22 +92,19 @@ sil_vtable StorageQualified {}
9392

9493
// CHECK: define{{( protected)?}} private %swift.type** [[BAS_TYPES_ACCESSOR]](%swift.type* %"Bas<T, U>")
9594
// CHECK: [[T0:%.*]] = bitcast %swift.type* %"Bas<T, U>" to %swift.type***
96-
// -- 6 words between the address point and the slot
97-
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i32 6
95+
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i64 -2
9896
// CHECK: load %swift.type**, %swift.type*** [[SLOT]], align 8
9997
// CHECK: br
10098
// CHECK: store {{.*}} @_T018field_type_vectors3FooVMf
10199
// CHECK: call %swift.type* @_T018field_type_vectors3BarVMa(%swift.type* %T)
102100

103101
// CHECK: define{{( protected)?}} private %swift.type** [[ZIM_TYPES_ACCESSOR]](%swift.type* %"Zim<T, U>")
104102
// CHECK: [[T0:%.*]] = bitcast %swift.type* %"Zim<T, U>" to %swift.type***
105-
// -- 14 words between the address point and the slot
106-
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i32 16
103+
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i64 -3
107104
// CHECK: load %swift.type**, %swift.type*** [[SLOT]], align 8
108105

109106
// CHECK: define{{( protected)?}} private %swift.type** [[ZANG_TYPES_ACCESSOR]](%swift.type* %"Zang<V>")
110107
// CHECK: [[T0:%.*]] = bitcast %swift.type* %"Zang<V>" to %swift.type***
111-
// -- 16 words between the address point and the slot
112-
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i32 18
108+
// CHECK: [[SLOT:%.*]] = getelementptr inbounds %swift.type**, %swift.type*** [[T0]], i64 -3
113109
// CHECK: load %swift.type**, %swift.type*** [[SLOT]], align 8
114110

‎test/IRGen/generic_classes.sil

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -341,20 +341,20 @@ entry(%c : $RootGeneric<Int32>):
341341
// CHECK-objc: [[METADATA_ARRAY:%.*]] = bitcast %swift.type* [[METADATA]] to i8**
342342
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 0
343343
// CHECK-objc: [[T1:%.*]] = bitcast i8** [[T0]] to %objc_class**
344-
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -25
344+
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -26
345345
// CHECK-objc: [[METACLASS:%.*]] = bitcast i8** [[T0]] to %objc_class*
346346
// CHECK-objc: store %objc_class* [[METACLASS]], %objc_class** [[T1]], align 8
347347
// Set up the instance rodata pointer.
348348
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 4
349349
// CHECK-objc: [[T1:%.*]] = bitcast i8** [[T0]] to i64*
350-
// CHECK-objc: [[RODATA:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -20
350+
// CHECK-objc: [[RODATA:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -21
351351
// CHECK-objc: [[T2:%.*]] = ptrtoint i8** [[RODATA]] to i64
352352
// CHECK-objc: [[T3:%.*]] = or i64 [[T2]], 1
353353
// CHECK-objc: store i64 [[T3]], i64* [[T1]], align 8
354354
// Set up the class rodata pointer.
355-
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -21
355+
// CHECK-objc: [[T0:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -22
356356
// CHECK-objc: [[T1:%.*]] = bitcast i8** [[T0]] to i64*
357-
// CHECK-objc: [[META_RODATA:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -11
357+
// CHECK-objc: [[META_RODATA:%.*]] = getelementptr inbounds i8*, i8** [[METADATA_ARRAY]], i32 -12
358358
// CHECK-objc: [[T2:%.*]] = ptrtoint i8** [[META_RODATA]] to i64
359359
// CHECK-objc: store i64 [[T2]], i64* [[T1]], align 8
360360
// Initialize our own dependent field offsets.

‎test/IRGen/generic_structs.sil

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ import Builtin
3535
// CHECK: @_T015generic_structs13SingleDynamicVMP = internal global <{ {{.*}} }> <{
3636
// -- template header
3737
// CHECK-SAME: %swift.type* (%swift.type_pattern*, i8**)* @create_generic_metadata_SingleDynamic,
38-
// CHECK-SAME: i32 168, i16 1, i16 8, [{{[0-9]+}} x i8*] zeroinitializer,
38+
// CHECK-SAME: i32 168, i16 1, i16 16, [{{[0-9]+}} x i8*] zeroinitializer,
3939
// -- placeholder for vwtable pointer
4040
// CHECK-SAME: i8* null,
4141
// -- address point
@@ -220,7 +220,7 @@ entry(%0 : $*ComplexDynamic<A, B>, %1 : $*Byteful, %2 : $*A, %3 : $*B, %4 : $*Ch
220220
// CHECK: [[T0:%.*]] = bitcast %swift.type* %T to i8*
221221
// CHECK: store i8* [[T0]], i8** [[T1]], align 8
222222
// Fill vwtable reference.
223-
// CHECK: [[VWTABLE_ADDR:%.*]] = getelementptr inbounds i8*, i8** [[SELF_ARRAY]], i32 5
223+
// CHECK: [[VWTABLE_ADDR:%.*]] = getelementptr inbounds i8*, i8** [[SELF_ARRAY]], i32 4
224224
// CHECK: [[VWTABLE_VAL:%.*]] = bitcast i8** [[VWTABLE_ADDR]] to i8*
225225
// CHECK: [[VWTABLE_SLOT_ADDR:%.*]] = getelementptr inbounds i8*, i8** [[SELF_ARRAY]], i32 -1
226226
// CHECK: store i8* [[VWTABLE_VAL]], i8** [[VWTABLE_SLOT_ADDR]], align 8

‎test/IRGen/generic_types.swift

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313
// CHECK-native-SAME: i32 160,
1414
// CHECK-objc-SAME: i32 344,
1515
// CHECK-SAME: i16 1,
16-
// CHECK-SAME: i16 200,
16+
// CHECK-SAME: i16 208,
1717
// CHECK-SAME: [{{[0-9]+}} x i8*] zeroinitializer,
1818
// CHECK-SAME: void ([[A]]*)* @_T013generic_types1ACfD,
1919
// CHECK-SAME: i8** @_T0BoWV,
@@ -39,7 +39,7 @@
3939
// CHECK-native-SAME: i32 152,
4040
// CHECK-objc-SAME: i32 336,
4141
// CHECK-SAME: i16 1,
42-
// CHECK-SAME: i16 200,
42+
// CHECK-SAME: i16 208,
4343
// CHECK-SAME: [{{[0-9]+}} x i8*] zeroinitializer,
4444
// CHECK-SAME: void ([[B]]*)* @_T013generic_types1BCfD,
4545
// CHECK-SAME: i8** @_T0BoWV,

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