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1 parent ba9cc35 commit e1ac7a0Copy full SHA for e1ac7a0
test/IRGen/ordering_x86.sil
@@ -41,4 +41,4 @@ bb0:
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// the order of features differs.
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// X86_64: define{{( protected)?}} swiftcc void @baz{{.*}}#0
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-// X86_64: #0 = {{.*}}"target-features"="+cx16,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"
+// X86_64: #0 = {{.*}}"target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"
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