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Merge tag 'drm-next-2024-03-13' of https://gitlab.freedesktop.org/drm/kernel
Pull drm updates from Dave Airlie: "Highlights are usual, more AMD IP blocks for future hw, i915/xe changes, Displayport tunnelling support for i915, msm YUV over DP changes, new tests for ttm, but its mostly a lot of stuff all over the place from lots of people. core: - EDID cleanups - scheduler error handling fixes - managed: add drmm_release_action() with tests - add ratelimited drm debug print - DPCD PSR early transport macro - DP tunneling and bandwidth allocation helpers - remove built-in edids - dp: Avoid AUX transfers on powered-down displays - dp: Add VSC SDP helpers cross drivers: - use new drm print helpers - switch to ->read_edid callback - gem: add stats for shared buffers plus updates to amdgpu, i915, xe syncobj: - fixes to waiting and sleeping ttm: - add tests - fix errno codes - simply busy-placement handling - fix page decryption media: - tc358743: fix v4l device registration video: - move all kernel parameters for video behind CONFIG_VIDEO sound: - remove <drm/drm_edid.h> include from header ci: - add tests for msm - fix apq8016 runner efifb: - use copy of global screen_info state vesafb: - use copy of global screen_info state simplefb: - fix logging bridge: - ite-6505: fix DP link-training bug - samsung-dsim: fix error checking in probe - samsung-dsim: add bsh-smm-s2/pro boards - tc358767: fix regmap usage - imx: add i.MX8MP HDMI PVI plus DT bindings - imx: add i.MX8MP HDMI TX plus DT bindings - sii902x: fix probing and unregistration - tc358767: limit pixel PLL input range - switch to new drm_bridge_read_edid() interface panel: - ltk050h3146w: error-handling fixes - panel-edp: support delay between power-on and enable; use put_sync in unprepare; support Mediatek MT8173 Chromebooks, BOE NV116WHM-N49 V8.0, BOE NV122WUM-N41, CSO MNC207QS1-1 plus DT bindings - panel-lvds: support EDT ETML0700Z9NDHA plus DT bindings - panel-novatek: FRIDA FRD400B25025-A-CTK plus DT bindings - add BOE TH101MB31IG002-28A plus DT bindings - add EDT ETML1010G3DRA plus DT bindings - add Novatek NT36672E LCD DSI plus DT bindings - nt36523: support 120Hz timings, fix includes - simple: fix display timings on RK32FN48H - visionox-vtdr6130: fix initialization - add Powkiddy RGB10MAX3 plus DT bindings - st7703: support panel rotation plus DT bindings - add Himax HX83112A plus DT bindings - ltk500hd1829: add support for ltk101b4029w and admatec 9904370 - simple: add BOE BP082WX1-100 8.2" panel plus DT bindungs panel-orientation-quirks: - GPD Win Mini amdgpu: - Validate DMABuf imports in compute VMs - Add RAS ACA framework - PSP 13 fixes - Misc code cleanups - Replay fixes - Atom interpretor PS, WS bounds checking - DML2 fixes - Audio fixes - DCN 3.5 Z state fixes - Remove deprecated ida_simple usage - UBSAN fixes - RAS fixes - Enable seq64 infrastructure - DC color block enablement - Documentation updates - DC documentation updates - DMCUB updates - ATHUB 4.1 support - LSDMA 7.0 support - JPEG DPG support - IH 7.0 support - HDP 7.0 support - VCN 5.0 support - SMU 13.0.6 updates - NBIO 7.11 updates - SDMA 6.1 updates - MMHUB 3.3 updates - DCN 3.5.1 support - NBIF 6.3.1 support - VPE 6.1.1 support amdkfd: - Validate DMABuf imports in compute VMs - SVM fixes - Trap handler updates and enhancements - Fix cache size reporting - Relocate the trap handler radeon: - Atom interpretor PS, WS bounds checking - Misc code cleanups xe: - new query for GuC submission version - Remove unused persistent exec_queues - Add vram frequency sysfs attributes - Add the flag XE_VM_BIND_FLAG_DUMPABLE - Drop pre-production workarounds - Drop kunit tests for unsupported platforms - Start pumbling SR-IOV support with memory based interrupts for VF - Allow to map BO in GGTT with PAT index corresponding to XE_CACHE_UC to work with memory based interrupts - Add GuC Doorbells Manager as prep work SR-IOV - Implement additional workarounds for xe2 and MTL - Program a few registers according to perfomance guide spec for Xe2 - Fix remaining 32b build issues and enable it back - Fix build with CONFIG_DEBUG_FS=n - Fix warnings from GuC ABI headers - Introduce Relay Communication for SR-IOV for VF <-> GuC <-> PF - Release mmap mappings on rpm suspend - Disable mid-thread preemption when not properly supported by hardware - Fix xe_exec by reserving extra fence slot for CPU bind - Fix xe_exec with full long running exec queue - Canonicalize addresses where needed for Xe2 and add to devcoredum - Toggle USM support for Xe2 - Only allow 1 ufence per exec / bind IOCTL - Add GuC firmware loading for Lunar Lake - Add XE_VMA_PTE_64K VMA flag i915: - Add more ADL-N PCI IDs - Enable fastboot also on older platforms - Early transport for panel replay and PSR - New ARL PCI IDs - DP TPS4 PHY test pattern support - Unify and improve VSC SDP for PSR and non-PSR cases - Refactor memory regions and improve debug logging - Rework global state serialization - Remove unused CDCLK divider fields - Unify HDCP connector logging format - Use display instead of graphics version in display code - Move VBT and opregion debugfs next to the implementation - Abstract opregion interface, use opaque type - MTL fixes - HPD handling fixes - Add GuC submission interface version query - Atomically invalidate userptr on mmu-notifier - Update handling of MMIO triggered reports - Don't make assumptions about intel_wakeref_t type - Extend driver code of Xe_LPG to Xe_LPG+ - Add flex arrays to struct i915_syncmap - Allow for very slow HuC loading - DP tunneling and bandwidth allocation support msm: - Correct bindings for MSM8976 and SM8650 platforms - Start migration of MDP5 platforms to DPU driver - X1E80100 MDSS support - DPU: - Improve DSC allocation, fixing several important corner cases - Add support for SDM630/SDM660 platforms - Simplify dpu_encoder_phys_ops - Apply fixes targeting DSC support with a single DSC encoder - Apply fixes for HCTL_EN timing configuration - X1E80100 support - Add support for YUV420 over DP - GPU: - fix sc7180 UBWC config - fix a7xx LLC config - new gpu support: a305B, a750, a702 - machine support: SM7150 (different power levels than other a618) - a7xx devcoredump support habanalabs: - configure IRQ affinity according to NUMA node - move HBM MMU page tables inside the HBM - improve device reset - check extended PCIe errors ivpu: - updates to firmware API - refactor BO allocation imx: - use devm_ functions during init hisilicon: - fix EDID includes mgag200: - improve ioremap usage - convert to struct drm_edid - Work around PCI write bursts nouveau: - disp: use kmemdup() - fix EDID includes - documentation fixes qaic: - fixes to BO handling - make use of DRM managed release - fix order of remove operations rockchip: - analogix_dp: get encoder port from DT - inno_hdmi: support HDMI for RK3128 - lvds: error-handling fixes ssd130x: - support SSD133x plus DT bindings tegra: - fix error handling tilcdc: - make use of DRM managed release v3d: - show memory stats in debugfs - Support display MMU page size vc4: - fix error handling in plane prepare_fb - fix framebuffer test in plane helpers virtio: - add venus capset defines vkms: - fix OOB access when programming the LUT - Kconfig improvements vmwgfx: - unmap surface before changing plane state - fix memory leak in error handling - documentation fixes - list command SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 as invalid - fix null-pointer deref in execbuf - refactor display-mode probing - fix fencing for creating cursor MOBs - fix cursor-memory lifetime xlnx: - fix live video input for ZynqMP DPSUB lima: - fix memory leak loongson: - fail if no VRAM present meson: - switch to new drm_bridge_read_edid() interface renesas: - add RZ/G2L DU support plus DT bindings mxsfb: - Use managed mode config sun4i: - HDMI: updates to atomic mode setting mediatek: - Add display driver for MT8188 VDOSYS1 - DSI driver cleanups - Filter modes according to hardware capability - Fix a null pointer crash in mtk_drm_crtc_finish_page_flip etnaviv: - enhancements for NPU and MRT support" * tag 'drm-next-2024-03-13' of https://gitlab.freedesktop.org/drm/kernel: (1420 commits) drm/amd/display: Removed redundant @ symbol to fix kernel-doc warnings in -next repo drm/amd/pm: wait for completion of the EnableGfxImu message drm/amdgpu/soc21: add mode2 asic reset for SMU IP v14.0.1 drm/amdgpu: add smu 14.0.1 support drm/amdgpu: add VPE 6.1.1 discovery support drm/amdgpu/vpe: add VPE 6.1.1 support drm/amdgpu/vpe: don't emit cond exec command under collaborate mode drm/amdgpu/vpe: add collaborate mode support for VPE drm/amdgpu/vpe: add PRED_EXE and COLLAB_SYNC OPCODE drm/amdgpu/vpe: add multi instance VPE support drm/amdgpu/discovery: add nbif v6_3_1 ip block drm/amdgpu: Add nbif v6_3_1 ip block support drm/amdgpu: Add pcie v6_1_0 ip headers (v5) drm/amdgpu: Add nbif v6_3_1 ip headers (v5) arch/powerpc: Remove <linux/fb.h> from backlight code macintosh/via-pmu-backlight: Include <linux/backlight.h> fbdev/chipsfb: Include <linux/backlight.h> drm/etnaviv: Restore some id values drm/amdkfd: make kfd_class constant drm/amdgpu: add ring timeout information in devcoredump ...
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Documentation/admin-guide/edid.rst

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@@ -24,37 +24,4 @@ restrictions later on.
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As a remedy for such situations, the kernel configuration item
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CONFIG_DRM_LOAD_EDID_FIRMWARE was introduced. It allows to provide an
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individually prepared or corrected EDID data set in the /lib/firmware
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directory from where it is loaded via the firmware interface. The code
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(see drivers/gpu/drm/drm_edid_load.c) contains built-in data sets for
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commonly used screen resolutions (800x600, 1024x768, 1280x1024, 1600x1200,
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1680x1050, 1920x1080) as binary blobs, but the kernel source tree does
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not contain code to create these data. In order to elucidate the origin
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of the built-in binary EDID blobs and to facilitate the creation of
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individual data for a specific misbehaving monitor, commented sources
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and a Makefile environment are given here.
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To create binary EDID and C source code files from the existing data
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material, simply type "make" in tools/edid/.
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If you want to create your own EDID file, copy the file 1024x768.S,
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replace the settings with your own data and add a new target to the
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Makefile. Please note that the EDID data structure expects the timing
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values in a different way as compared to the standard X11 format.
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X11:
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HTimings:
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hdisp hsyncstart hsyncend htotal
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VTimings:
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vdisp vsyncstart vsyncend vtotal
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EDID::
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#define XPIX hdisp
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#define XBLANK htotal-hdisp
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#define XOFFSET hsyncstart-hdisp
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#define XPULSE hsyncend-hsyncstart
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#define YPIX vdisp
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#define YBLANK vtotal-vdisp
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#define YOFFSET vsyncstart-vdisp
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#define YPULSE vsyncend-vsyncstart
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directory from where it is loaded via the firmware interface.

Documentation/admin-guide/kernel-parameters.txt

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panels may send no or incorrect EDID data sets.
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This parameter allows to specify an EDID data sets
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in the /lib/firmware directory that are used instead.
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Generic built-in EDID data sets are used, if one of
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edid/1024x768.bin, edid/1280x1024.bin,
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edid/1680x1050.bin, or edid/1920x1080.bin is given
1179-
and no file with the same name exists. Details and
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instructions how to build your own EDID data are
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available in Documentation/admin-guide/edid.rst. An EDID
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data set will only be used for a particular connector,
1183-
if its name and a colon are prepended to the EDID
1184-
name. Each connector may use a unique EDID data
1185-
set by separating the files with a comma. An EDID
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An EDID data set will only be used for a particular
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connector, if its name and a colon are prepended to
1178+
the EDID name. Each connector may use a unique EDID
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data set by separating the files with a comma. An EDID
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data set with no connector name will be used for
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any connectors not explicitly specified.
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
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title: Freescale i.MX8MP DWC HDMI TX Encoder
8+
9+
maintainers:
10+
- Lucas Stach <[email protected]>
11+
12+
description:
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The i.MX8MP HDMI transmitter is a Synopsys DesignWare
14+
HDMI 2.0a TX controller IP.
15+
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allOf:
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- $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
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properties:
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compatible:
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enum:
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- fsl,imx8mp-hdmi-tx
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reg-io-width:
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const: 1
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: iahb
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- const: isfr
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- const: cec
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- const: pix
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Parallel RGB input port
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: HDMI output port
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- power-domains
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- ports
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/imx8mp-power.h>
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hdmi@32fd8000 {
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compatible = "fsl,imx8mp-hdmi-tx";
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reg = <0x32fd8000 0x7eff>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MP_CLK_HDMI_APB>,
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<&clk IMX8MP_CLK_HDMI_REF_266M>,
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<&clk IMX8MP_CLK_32K>,
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<&hdmi_tx_phy>;
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clock-names = "iahb", "isfr", "cec", "pix";
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power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
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reg-io-width = <1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_tx_from_pvi: endpoint {
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remote-endpoint = <&pvi_to_hdmi_tx>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_tx_out: endpoint {
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remote-endpoint = <&hdmi0_con>;
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};
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};
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};
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};

Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml

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title: SN65DSI86 DSI to eDP bridge chip
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maintainers:
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- Sandeep Panda <spanda@codeaurora.org>
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- Douglas Anderson <dianders@chromium.org>
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description: |
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The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8MP HDMI Parallel Video Interface
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maintainers:
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- Lucas Stach <[email protected]>
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description:
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The HDMI parallel video interface is a timing and sync generator block in the
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i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
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properties:
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compatible:
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const: fsl,imx8mp-hdmi-pvi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Input from the LCDIF controller.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Output to the HDMI TX controller.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- interrupts
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- power-domains
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/imx8mp-power.h>
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display-bridge@32fc4000 {
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compatible = "fsl,imx8mp-hdmi-pvi";
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reg = <0x32fc4000 0x44>;
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interrupt-parent = <&irqsteer_hdmi>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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pvi_from_lcdif3: endpoint {
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remote-endpoint = <&lcdif3_to_pvi>;
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};
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};
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port@1 {
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reg = <1>;
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pvi_to_hdmi_tx: endpoint {
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remote-endpoint = <&hdmi_tx_from_pvi>;
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};
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};
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};
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};

Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml

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- qcom,msm8916-dsi-ctrl
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- qcom,msm8953-dsi-ctrl
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- qcom,msm8974-dsi-ctrl
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- qcom,msm8976-dsi-ctrl
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- qcom,msm8996-dsi-ctrl
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- qcom,msm8998-dsi-ctrl
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- qcom,qcm2290-dsi-ctrl
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contains:
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enum:
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- qcom,msm8953-dsi-ctrl
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- qcom,msm8976-dsi-ctrl
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then:
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properties:
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clocks:

Documentation/devicetree/bindings/display/msm/gmu.yaml

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enum:
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- qcom,adreno-gmu-730.1
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- qcom,adreno-gmu-740.1
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- qcom,adreno-gmu-750.1
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then:
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properties:
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reg:

Documentation/devicetree/bindings/display/msm/gpu.yaml

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The driver is parsing the compat string for Adreno to
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figure out the gpu-id and patch level.
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items:
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- pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]$'
26+
- pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]+$'
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- const: qcom,adreno
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- description: |
2929
The driver is parsing the compat string for Imageon to
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properties:
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compatible:
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contains:
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pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]$'
130+
pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
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then:
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properties:
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properties:
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compatible:
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contains:
206-
pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]$'
206+
pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'
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then: # Starting with A6xx, the clocks are usually defined in the GMU node
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properties:

Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml

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- qcom,dsi-phy-20nm
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- qcom,dsi-phy-28nm-8226
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- qcom,dsi-phy-28nm-hpm
130+
- qcom,dsi-phy-28nm-hpm-fam-b
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- qcom,dsi-phy-28nm-lp
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- qcom,hdmi-phy-8084
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- qcom,hdmi-phy-8660

Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml

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properties:
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compatible:
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const: qcom,sm8650-dpu
16+
enum:
17+
- qcom,sm8650-dpu
18+
- qcom,x1e80100-dpu
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reg:
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items:

Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml

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patternProperties:
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"^display-controller@[0-9a-f]+$":
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type: object
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additionalProperties: true
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properties:
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compatible:
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const: qcom,sm8650-dpu
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4445
"^displayport-controller@[0-9a-f]+$":
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type: object
47+
additionalProperties: true
4648
properties:
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compatible:
4850
const: qcom,sm8650-dp
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"^dsi@[0-9a-f]+$":
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type: object
54+
additionalProperties: true
5255
properties:
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compatible:
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items:
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5861
"^phy@[0-9a-f]+$":
5962
type: object
63+
additionalProperties: true
6064
properties:
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compatible:
6266
const: qcom,sm8650-dsi-phy-4nm

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