Skip to content

Commit b704380

Browse files
alexdeucherLuben Tuikov
alexdeucher
authored and
Luben Tuikov
committed
drm/amdgpu: move buffer funcs setting up a level
Rather than doing this in the IP code for the SDMA paging engine, move it up to the core device level init level. This should fix the scheduler init ordering. v2: drop extra parens v3: drop SDMA helpers v4: Added a Fixes tag because amdgpu dereferences an uninitialized scheduler without this patch, and this patch fixes this. (Luben) Tested-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Christian König <[email protected]> Fixes: 56e4496 ("drm/sched: Convert the GPU scheduler to variable number of run-queues") Signed-off-by: Luben Tuikov <[email protected]>
1 parent c07bf16 commit b704380

File tree

11 files changed

+19
-84
lines changed

11 files changed

+19
-84
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2450,6 +2450,9 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
24502450
if (r)
24512451
goto init_failed;
24522452

2453+
if (adev->mman.buffer_funcs_ring->sched.ready)
2454+
amdgpu_ttm_set_buffer_funcs_status(adev, true);
2455+
24532456
/* Don't init kfd if whole hive need to be reset during init */
24542457
if (!adev->gmc.xgmi.pending_reset) {
24552458
kgd2kfd_init_zone_device(adev);
@@ -3045,6 +3048,8 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
30453048
amdgpu_virt_request_full_gpu(adev, false);
30463049
}
30473050

3051+
amdgpu_ttm_set_buffer_funcs_status(adev, false);
3052+
30483053
r = amdgpu_device_ip_suspend_phase1(adev);
30493054
if (r)
30503055
return r;
@@ -3234,6 +3239,9 @@ static int amdgpu_device_ip_resume(struct amdgpu_device *adev)
32343239

32353240
r = amdgpu_device_ip_resume_phase2(adev);
32363241

3242+
if (adev->mman.buffer_funcs_ring->sched.ready)
3243+
amdgpu_ttm_set_buffer_funcs_status(adev, true);
3244+
32373245
return r;
32383246
}
32393247

@@ -4008,6 +4016,8 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev)
40084016
/* disable ras feature must before hw fini */
40094017
amdgpu_ras_pre_fini(adev);
40104018

4019+
amdgpu_ttm_set_buffer_funcs_status(adev, false);
4020+
40114021
amdgpu_device_ip_fini_early(adev);
40124022

40134023
amdgpu_irq_fini_hw(adev);
@@ -4146,6 +4156,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
41464156

41474157
amdgpu_ras_suspend(adev);
41484158

4159+
amdgpu_ttm_set_buffer_funcs_status(adev, false);
4160+
41494161
amdgpu_device_ip_suspend_phase1(adev);
41504162

41514163
if (!adev->in_s0ix)
@@ -4971,6 +4983,9 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,
49714983
if (r)
49724984
goto out;
49734985

4986+
if (tmp_adev->mman.buffer_funcs_ring->sched.ready)
4987+
amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true);
4988+
49744989
if (vram_lost)
49754990
amdgpu_device_fill_reset_magic(tmp_adev);
49764991

‎drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -289,27 +289,6 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev,
289289
return err;
290290
}
291291

292-
void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev)
293-
{
294-
struct amdgpu_ring *sdma;
295-
int i;
296-
297-
for (i = 0; i < adev->sdma.num_instances; i++) {
298-
if (adev->sdma.has_page_queue) {
299-
sdma = &adev->sdma.instance[i].page;
300-
if (adev->mman.buffer_funcs_ring == sdma) {
301-
amdgpu_ttm_set_buffer_funcs_status(adev, false);
302-
break;
303-
}
304-
}
305-
sdma = &adev->sdma.instance[i].ring;
306-
if (adev->mman.buffer_funcs_ring == sdma) {
307-
amdgpu_ttm_set_buffer_funcs_status(adev, false);
308-
break;
309-
}
310-
}
311-
}
312-
313292
int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev)
314293
{
315294
int err = 0;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -169,7 +169,6 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, u32 instance,
169169
bool duplicate);
170170
void amdgpu_sdma_destroy_inst_ctx(struct amdgpu_device *adev,
171171
bool duplicate);
172-
void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev);
173172
int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev);
174173

175174
#endif

‎drivers/gpu/drm/amd/amdgpu/cik_sdma.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -308,8 +308,6 @@ static void cik_sdma_gfx_stop(struct amdgpu_device *adev)
308308
u32 rb_cntl;
309309
int i;
310310

311-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
312-
313311
for (i = 0; i < adev->sdma.num_instances; i++) {
314312
rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
315313
rb_cntl &= ~SDMA0_GFX_RB_CNTL__RB_ENABLE_MASK;
@@ -498,9 +496,6 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
498496
r = amdgpu_ring_test_helper(ring);
499497
if (r)
500498
return r;
501-
502-
if (adev->mman.buffer_funcs_ring == ring)
503-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
504499
}
505500

506501
return 0;

‎drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -339,8 +339,6 @@ static void sdma_v2_4_gfx_stop(struct amdgpu_device *adev)
339339
u32 rb_cntl, ib_cntl;
340340
int i;
341341

342-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
343-
344342
for (i = 0; i < adev->sdma.num_instances; i++) {
345343
rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
346344
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
@@ -474,9 +472,6 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
474472
r = amdgpu_ring_test_helper(ring);
475473
if (r)
476474
return r;
477-
478-
if (adev->mman.buffer_funcs_ring == ring)
479-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
480475
}
481476

482477
return 0;

‎drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -513,8 +513,6 @@ static void sdma_v3_0_gfx_stop(struct amdgpu_device *adev)
513513
u32 rb_cntl, ib_cntl;
514514
int i;
515515

516-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
517-
518516
for (i = 0; i < adev->sdma.num_instances; i++) {
519517
rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
520518
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
@@ -746,9 +744,6 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
746744
r = amdgpu_ring_test_helper(ring);
747745
if (r)
748746
return r;
749-
750-
if (adev->mman.buffer_funcs_ring == ring)
751-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
752747
}
753748

754749
return 0;

‎drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

Lines changed: 1 addition & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -875,8 +875,6 @@ static void sdma_v4_0_gfx_enable(struct amdgpu_device *adev, bool enable)
875875
u32 rb_cntl, ib_cntl;
876876
int i;
877877

878-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
879-
880878
for (i = 0; i < adev->sdma.num_instances; i++) {
881879
rb_cntl = RREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL);
882880
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, enable ? 1 : 0);
@@ -911,8 +909,6 @@ static void sdma_v4_0_page_stop(struct amdgpu_device *adev)
911909
u32 rb_cntl, ib_cntl;
912910
int i;
913911

914-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
915-
916912
for (i = 0; i < adev->sdma.num_instances; i++) {
917913
rb_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL);
918914
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_PAGE_RB_CNTL,
@@ -1399,13 +1395,7 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
13991395
r = amdgpu_ring_test_helper(page);
14001396
if (r)
14011397
return r;
1402-
1403-
if (adev->mman.buffer_funcs_ring == page)
1404-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
14051398
}
1406-
1407-
if (adev->mman.buffer_funcs_ring == ring)
1408-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
14091399
}
14101400

14111401
return r;
@@ -1917,11 +1907,8 @@ static int sdma_v4_0_hw_fini(void *handle)
19171907
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
19181908
int i;
19191909

1920-
if (amdgpu_sriov_vf(adev)) {
1921-
/* disable the scheduler for SDMA */
1922-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
1910+
if (amdgpu_sriov_vf(adev))
19231911
return 0;
1924-
}
19251912

19261913
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) {
19271914
for (i = 0; i < adev->sdma.num_instances; i++) {
@@ -1960,7 +1947,6 @@ static int sdma_v4_0_resume(void *handle)
19601947
if (adev->in_s0ix) {
19611948
sdma_v4_0_enable(adev, true);
19621949
sdma_v4_0_gfx_enable(adev, true);
1963-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
19641950
return 0;
19651951
}
19661952

‎drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -559,8 +559,6 @@ static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev)
559559
u32 rb_cntl, ib_cntl;
560560
int i;
561561

562-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
563-
564562
for (i = 0; i < adev->sdma.num_instances; i++) {
565563
rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));
566564
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
@@ -825,9 +823,6 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)
825823
r = amdgpu_ring_test_helper(ring);
826824
if (r)
827825
return r;
828-
829-
if (adev->mman.buffer_funcs_ring == ring)
830-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
831826
}
832827

833828
return 0;
@@ -1427,11 +1422,8 @@ static int sdma_v5_0_hw_fini(void *handle)
14271422
{
14281423
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
14291424

1430-
if (amdgpu_sriov_vf(adev)) {
1431-
/* disable the scheduler for SDMA */
1432-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
1425+
if (amdgpu_sriov_vf(adev))
14331426
return 0;
1434-
}
14351427

14361428
sdma_v5_0_ctx_switch_enable(adev, false);
14371429
sdma_v5_0_enable(adev, false);

‎drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -364,8 +364,6 @@ static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev)
364364
u32 rb_cntl, ib_cntl;
365365
int i;
366366

367-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
368-
369367
for (i = 0; i < adev->sdma.num_instances; i++) {
370368
rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));
371369
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
@@ -625,9 +623,6 @@ static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)
625623
r = amdgpu_ring_test_helper(ring);
626624
if (r)
627625
return r;
628-
629-
if (adev->mman.buffer_funcs_ring == ring)
630-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
631626
}
632627

633628
return 0;
@@ -1285,11 +1280,8 @@ static int sdma_v5_2_hw_fini(void *handle)
12851280
{
12861281
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
12871282

1288-
if (amdgpu_sriov_vf(adev)) {
1289-
/* disable the scheduler for SDMA */
1290-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
1283+
if (amdgpu_sriov_vf(adev))
12911284
return 0;
1292-
}
12931285

12941286
sdma_v5_2_ctx_switch_enable(adev, false);
12951287
sdma_v5_2_enable(adev, false);

‎drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -381,8 +381,6 @@ static void sdma_v6_0_gfx_stop(struct amdgpu_device *adev)
381381
u32 rb_cntl, ib_cntl;
382382
int i;
383383

384-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
385-
386384
for (i = 0; i < adev->sdma.num_instances; i++) {
387385
rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));
388386
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_ENABLE, 0);
@@ -594,9 +592,6 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)
594592
r = amdgpu_ring_test_helper(ring);
595593
if (r)
596594
return r;
597-
598-
if (adev->mman.buffer_funcs_ring == ring)
599-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
600595
}
601596

602597
return 0;
@@ -1343,11 +1338,8 @@ static int sdma_v6_0_hw_fini(void *handle)
13431338
{
13441339
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
13451340

1346-
if (amdgpu_sriov_vf(adev)) {
1347-
/* disable the scheduler for SDMA */
1348-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
1341+
if (amdgpu_sriov_vf(adev))
13491342
return 0;
1350-
}
13511343

13521344
sdma_v6_0_ctxempty_int_enable(adev, false);
13531345
sdma_v6_0_enable(adev, false);

‎drivers/gpu/drm/amd/amdgpu/si_dma.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -115,8 +115,6 @@ static void si_dma_stop(struct amdgpu_device *adev)
115115
u32 rb_cntl;
116116
unsigned i;
117117

118-
amdgpu_sdma_unset_buffer_funcs_helper(adev);
119-
120118
for (i = 0; i < adev->sdma.num_instances; i++) {
121119
/* dma0 */
122120
rb_cntl = RREG32(DMA_RB_CNTL + sdma_offsets[i]);
@@ -177,9 +175,6 @@ static int si_dma_start(struct amdgpu_device *adev)
177175
r = amdgpu_ring_test_helper(ring);
178176
if (r)
179177
return r;
180-
181-
if (adev->mman.buffer_funcs_ring == ring)
182-
amdgpu_ttm_set_buffer_funcs_status(adev, true);
183178
}
184179

185180
return 0;

0 commit comments

Comments
 (0)