@@ -723,7 +723,6 @@ class YkIRWriter {
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// Eventually we will have to encode the alignment of the load into our IR
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// and have the trace code generator split up the loads where necessary.
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// The same will have to be done for store instructions.
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- DataLayout DL (&M);
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if (I->isVolatile () || (I->getOrdering () != AtomicOrdering::NotAtomic) ||
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(I->getPointerAddressSpace () != 0 ) ||
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(I->getAlign () != DL.getPrefTypeAlign (I->getType ()))) {
@@ -752,7 +751,6 @@ class YkIRWriter {
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//
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// See the comment in `serialiseLoadInst()` for context on misaligned memory
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// accesses.
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- DataLayout DL (&M);
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if (I->isVolatile () || (I->getOrdering () != AtomicOrdering::NotAtomic) ||
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(I->getPointerAddressSpace () != 0 ) ||
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(I->getAlign () !=
@@ -1019,7 +1017,6 @@ class YkIRWriter {
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// - vector casts
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std::optional<CastKind> CK = getCastKind (I->getOpcode ());
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if (isa<PtrToIntInst>(I)) {
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- DataLayout DL (&M);
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TypeSize SrcSize = DL.getTypeSizeInBits (I->getSrcTy ());
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TypeSize DstSize = DL.getTypeSizeInBits (I->getDestTy ());
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if (DstSize < SrcSize) {
@@ -1237,7 +1234,6 @@ class YkIRWriter {
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void serialiseStructType (StructType *STy) {
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serialiseTypeKind (TypeKindStruct);
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unsigned NumFields = STy->getNumElements ();
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- DataLayout DL (&M);
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const StructLayout *SL = DL.getStructLayout (STy);
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// num_fields:
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OutStreamer.emitSizeT (NumFields);
@@ -1312,7 +1308,6 @@ class YkIRWriter {
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// ty_idx:
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OutStreamer.emitSizeT (typeIndex (NP->getType ()));
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// num_bytes:
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- DataLayout DL (&M);
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assert (DL.getPointerSize (NP->getType ()->getAddressSpace ()) ==
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sizeof (size_t ));
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OutStreamer.emitSizeT (sizeof (size_t ));
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