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[ConstantFold] Fold more operations to poison
This patch folds more operations to poison. Alive2 proof: https://alive2.llvm.org/ce/z/mxcb9G (it does not contain tests about div/rem because they fold to poison when raising UB) Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D92270
1 parent 1856e22 commit 53040a9

34 files changed

+147
-132
lines changed

clang/test/Frontend/fixed_point_unary.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ void inc_usa() {
9090
// SIGNED-LABEL: @inc_uf(
9191
// SIGNED-NEXT: entry:
9292
// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
93-
// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], undef
93+
// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], poison
9494
// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
9595
// SIGNED-NEXT: ret void
9696
//
@@ -271,7 +271,7 @@ void dec_usa() {
271271
// SIGNED-LABEL: @dec_uf(
272272
// SIGNED-NEXT: entry:
273273
// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
274-
// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], undef
274+
// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], poison
275275
// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
276276
// SIGNED-NEXT: ret void
277277
//

llvm/lib/IR/ConstantFold.cpp

Lines changed: 29 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -630,7 +630,7 @@ Constant *llvm::ConstantFoldCastInstruction(unsigned opc, Constant *V,
630630
V.convertToInteger(IntVal, APFloat::rmTowardZero, &ignored)) {
631631
// Undefined behavior invoked - the destination type can't represent
632632
// the input constant.
633-
return UndefValue::get(DestTy);
633+
return PoisonValue::get(DestTy);
634634
}
635635
return ConstantInt::get(FPC->getContext(), IntVal);
636636
}
@@ -916,7 +916,7 @@ Constant *llvm::ConstantFoldInsertElementInstruction(Constant *Val,
916916

917917
unsigned NumElts = ValTy->getNumElements();
918918
if (CIdx->uge(NumElts))
919-
return UndefValue::get(Val->getType());
919+
return PoisonValue::get(Val->getType());
920920

921921
SmallVector<Constant*, 16> Result;
922922
Result.reserve(NumElts);
@@ -1144,52 +1144,50 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
11441144
}
11451145
case Instruction::SDiv:
11461146
case Instruction::UDiv:
1147-
// X / undef -> undef
1148-
if (isa<UndefValue>(C2))
1149-
return C2;
1150-
// undef / 0 -> undef
1147+
// X / undef -> poison
1148+
// X / 0 -> poison
1149+
if (match(C2, m_CombineOr(m_Undef(), m_Zero())))
1150+
return PoisonValue::get(C2->getType());
11511151
// undef / 1 -> undef
1152-
if (match(C2, m_Zero()) || match(C2, m_One()))
1152+
if (match(C2, m_One()))
11531153
return C1;
11541154
// undef / X -> 0 otherwise
11551155
return Constant::getNullValue(C1->getType());
11561156
case Instruction::URem:
11571157
case Instruction::SRem:
1158-
// X % undef -> undef
1159-
if (match(C2, m_Undef()))
1160-
return C2;
1161-
// undef % 0 -> undef
1162-
if (match(C2, m_Zero()))
1163-
return C1;
1158+
// X % undef -> poison
1159+
// X % 0 -> poison
1160+
if (match(C2, m_CombineOr(m_Undef(), m_Zero())))
1161+
return PoisonValue::get(C2->getType());
11641162
// undef % X -> 0 otherwise
11651163
return Constant::getNullValue(C1->getType());
11661164
case Instruction::Or: // X | undef -> -1
11671165
if (isa<UndefValue>(C1) && isa<UndefValue>(C2)) // undef | undef -> undef
11681166
return C1;
11691167
return Constant::getAllOnesValue(C1->getType()); // undef | X -> ~0
11701168
case Instruction::LShr:
1171-
// X >>l undef -> undef
1169+
// X >>l undef -> poison
11721170
if (isa<UndefValue>(C2))
1173-
return C2;
1171+
return PoisonValue::get(C2->getType());
11741172
// undef >>l 0 -> undef
11751173
if (match(C2, m_Zero()))
11761174
return C1;
11771175
// undef >>l X -> 0
11781176
return Constant::getNullValue(C1->getType());
11791177
case Instruction::AShr:
1180-
// X >>a undef -> undef
1178+
// X >>a undef -> poison
11811179
if (isa<UndefValue>(C2))
1182-
return C2;
1180+
return PoisonValue::get(C2->getType());
11831181
// undef >>a 0 -> undef
11841182
if (match(C2, m_Zero()))
11851183
return C1;
1186-
// TODO: undef >>a X -> undef if the shift is exact
1184+
// TODO: undef >>a X -> poison if the shift is exact
11871185
// undef >>a X -> 0
11881186
return Constant::getNullValue(C1->getType());
11891187
case Instruction::Shl:
11901188
// X << undef -> undef
11911189
if (isa<UndefValue>(C2))
1192-
return C2;
1190+
return PoisonValue::get(C2->getType());
11931191
// undef << 0 -> undef
11941192
if (match(C2, m_Zero()))
11951193
return C1;
@@ -1242,14 +1240,14 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
12421240
if (CI2->isOne())
12431241
return C1; // X / 1 == X
12441242
if (CI2->isZero())
1245-
return UndefValue::get(CI2->getType()); // X / 0 == undef
1243+
return PoisonValue::get(CI2->getType()); // X / 0 == poison
12461244
break;
12471245
case Instruction::URem:
12481246
case Instruction::SRem:
12491247
if (CI2->isOne())
12501248
return Constant::getNullValue(CI2->getType()); // X % 1 == 0
12511249
if (CI2->isZero())
1252-
return UndefValue::get(CI2->getType()); // X % 0 == undef
1250+
return PoisonValue::get(CI2->getType()); // X % 0 == poison
12531251
break;
12541252
case Instruction::And:
12551253
if (CI2->isZero()) return C2; // X & 0 == 0
@@ -1363,15 +1361,15 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
13631361
case Instruction::SDiv:
13641362
assert(!CI2->isZero() && "Div by zero handled above");
13651363
if (C2V.isAllOnesValue() && C1V.isMinSignedValue())
1366-
return UndefValue::get(CI1->getType()); // MIN_INT / -1 -> undef
1364+
return PoisonValue::get(CI1->getType()); // MIN_INT / -1 -> poison
13671365
return ConstantInt::get(CI1->getContext(), C1V.sdiv(C2V));
13681366
case Instruction::URem:
13691367
assert(!CI2->isZero() && "Div by zero handled above");
13701368
return ConstantInt::get(CI1->getContext(), C1V.urem(C2V));
13711369
case Instruction::SRem:
13721370
assert(!CI2->isZero() && "Div by zero handled above");
13731371
if (C2V.isAllOnesValue() && C1V.isMinSignedValue())
1374-
return UndefValue::get(CI1->getType()); // MIN_INT % -1 -> undef
1372+
return PoisonValue::get(CI1->getType()); // MIN_INT % -1 -> poison
13751373
return ConstantInt::get(CI1->getContext(), C1V.srem(C2V));
13761374
case Instruction::And:
13771375
return ConstantInt::get(CI1->getContext(), C1V & C2V);
@@ -1382,15 +1380,15 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
13821380
case Instruction::Shl:
13831381
if (C2V.ult(C1V.getBitWidth()))
13841382
return ConstantInt::get(CI1->getContext(), C1V.shl(C2V));
1385-
return UndefValue::get(C1->getType()); // too big shift is undef
1383+
return PoisonValue::get(C1->getType()); // too big shift is poison
13861384
case Instruction::LShr:
13871385
if (C2V.ult(C1V.getBitWidth()))
13881386
return ConstantInt::get(CI1->getContext(), C1V.lshr(C2V));
1389-
return UndefValue::get(C1->getType()); // too big shift is undef
1387+
return PoisonValue::get(C1->getType()); // too big shift is poison
13901388
case Instruction::AShr:
13911389
if (C2V.ult(C1V.getBitWidth()))
13921390
return ConstantInt::get(CI1->getContext(), C1V.ashr(C2V));
1393-
return UndefValue::get(C1->getType()); // too big shift is undef
1391+
return PoisonValue::get(C1->getType()); // too big shift is poison
13941392
}
13951393
}
13961394

@@ -1436,7 +1434,7 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
14361434
// Fast path for splatted constants.
14371435
if (Constant *C2Splat = C2->getSplatValue()) {
14381436
if (Instruction::isIntDivRem(Opcode) && C2Splat->isNullValue())
1439-
return UndefValue::get(VTy);
1437+
return PoisonValue::get(VTy);
14401438
if (Constant *C1Splat = C1->getSplatValue()) {
14411439
return ConstantVector::getSplat(
14421440
VTy->getElementCount(),
@@ -1453,9 +1451,9 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1,
14531451
Constant *LHS = ConstantExpr::getExtractElement(C1, ExtractIdx);
14541452
Constant *RHS = ConstantExpr::getExtractElement(C2, ExtractIdx);
14551453

1456-
// If any element of a divisor vector is zero, the whole op is undef.
1454+
// If any element of a divisor vector is zero, the whole op is poison.
14571455
if (Instruction::isIntDivRem(Opcode) && RHS->isNullValue())
1458-
return UndefValue::get(VTy);
1456+
return PoisonValue::get(VTy);
14591457

14601458
Result.push_back(ConstantExpr::get(Opcode, LHS, RHS));
14611459
}
@@ -2338,7 +2336,8 @@ Constant *llvm::ConstantFoldGetElementPtr(Type *PointeeTy, Constant *C,
23382336
return PoisonValue::get(GEPTy);
23392337

23402338
if (isa<UndefValue>(C))
2341-
return UndefValue::get(GEPTy);
2339+
// If inbounds, we can choose an out-of-bounds pointer as a base pointer.
2340+
return InBounds ? PoisonValue::get(GEPTy) : UndefValue::get(GEPTy);
23422341

23432342
Constant *Idx0 = cast<Constant>(Idxs[0]);
23442343
if (Idxs.size() == 1 && (Idx0->isNullValue() || isa<UndefValue>(Idx0)))

llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ define i32 @select_sdiv_rhs_const_i32(i1 %cond) {
4242

4343
define <2 x i32> @select_sdiv_lhs_const_v2i32(i1 %cond) {
4444
; IR-LABEL: @select_sdiv_lhs_const_v2i32(
45-
; IR-NEXT: [[OP:%.*]] = select i1 [[COND:%.*]], <2 x i32> <i32 666, i32 undef>, <2 x i32> <i32 555, i32 1428>
45+
; IR-NEXT: [[OP:%.*]] = select i1 [[COND:%.*]], <2 x i32> <i32 666, i32 poison>, <2 x i32> <i32 555, i32 1428>
4646
; IR-NEXT: ret <2 x i32> [[OP]]
4747
;
4848
; GCN-LABEL: select_sdiv_lhs_const_v2i32:

llvm/test/Transforms/InstCombine/apint-shift.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -337,7 +337,7 @@ define <2 x i1> @test16vec_nonuniform(<2 x i84> %X) {
337337

338338
define <2 x i1> @test16vec_undef(<2 x i84> %X) {
339339
; CHECK-LABEL: @test16vec_undef(
340-
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 undef>
340+
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 poison>
341341
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i84> [[TMP1]], zeroinitializer
342342
; CHECK-NEXT: ret <2 x i1> [[CMP]]
343343
;

llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -418,7 +418,7 @@ define <3 x i8> @positive_sameconst_vec_undef1(<3 x i8> %x) {
418418

419419
define <3 x i8> @positive_sameconst_vec_undef2(<3 x i8> %x) {
420420
; CHECK-LABEL: @positive_sameconst_vec_undef2(
421-
; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 undef, i8 -8>
421+
; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 poison, i8 -8>
422422
; CHECK-NEXT: ret <3 x i8> [[RET]]
423423
;
424424
%tmp0 = ashr <3 x i8> %x, <i8 3, i8 undef, i8 3>

llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -418,7 +418,7 @@ define <3 x i8> @positive_sameconst_vec_undef1(<3 x i8> %x) {
418418

419419
define <3 x i8> @positive_sameconst_vec_undef2(<3 x i8> %x) {
420420
; CHECK-LABEL: @positive_sameconst_vec_undef2(
421-
; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 undef, i8 -8>
421+
; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 poison, i8 -8>
422422
; CHECK-NEXT: ret <3 x i8> [[RET]]
423423
;
424424
%tmp0 = lshr <3 x i8> %x, <i8 3, i8 undef, i8 3>

llvm/test/Transforms/InstCombine/canonicalize-shl-lshr-to-masking.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -171,7 +171,7 @@ define <3 x i32> @positive_sameconst_vec_undef1(<3 x i32> %x) {
171171

172172
define <3 x i32> @positive_sameconst_vec_undef2(<3 x i32> %x) {
173173
; CHECK-LABEL: @positive_sameconst_vec_undef2(
174-
; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 134217727, i32 undef, i32 134217727>
174+
; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 134217727, i32 poison, i32 134217727>
175175
; CHECK-NEXT: ret <3 x i32> [[RET]]
176176
;
177177
%tmp0 = shl <3 x i32> %x, <i32 5, i32 undef, i32 5>

llvm/test/Transforms/InstCombine/icmp.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2784,7 +2784,7 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform(<2 x i32> %x) {
27842784

27852785
define <2 x i1> @icmp_and_or_lshr_cst_vec_undef(<2 x i32> %x) {
27862786
; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_undef(
2787-
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 3, i32 -1>
2787+
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 3, i32 poison>
27882788
; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer
27892789
; CHECK-NEXT: ret <2 x i1> [[RET]]
27902790
;
@@ -2828,7 +2828,7 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform_commute(<2 x i32> %xp) {
28282828
define <2 x i1> @icmp_and_or_lshr_cst_vec_undef_commute(<2 x i32> %xp) {
28292829
; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_undef_commute(
28302830
; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP:%.*]], <i32 42, i32 42>
2831-
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 -1>
2831+
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 poison>
28322832
; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer
28332833
; CHECK-NEXT: ret <2 x i1> [[RET]]
28342834
;

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-a.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {
103103
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
104104
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
105105
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]
106-
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
106+
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
107107
; CHECK-NEXT: ret <8 x i32> [[T7]]
108108
;
109109
%t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>
@@ -138,7 +138,7 @@ define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {
138138
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
139139
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
140140
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]
141-
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 undef, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 -1>
141+
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 -1>
142142
; CHECK-NEXT: ret <8 x i32> [[T7]]
143143
;
144144
%t0 = add <8 x i32> %nbits, <i32 -33, i32 -32, i32 -31, i32 -1, i32 0, i32 1, i32 31, i32 32>

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {
103103
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
104104
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
105105
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]
106-
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
106+
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
107107
; CHECK-NEXT: ret <8 x i32> [[T7]]
108108
;
109109
%t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>
@@ -138,7 +138,7 @@ define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {
138138
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
139139
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
140140
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]
141-
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 undef, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 -1>
141+
; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 -1>
142142
; CHECK-NEXT: ret <8 x i32> [[T7]]
143143
;
144144
%t0 = add <8 x i32> %nbits, <i32 -33, i32 -32, i32 -31, i32 -1, i32 0, i32 1, i32 31, i32 32>

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {
8383
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
8484
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
8585
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]
86-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
86+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
8787
; CHECK-NEXT: ret <8 x i32> [[T5]]
8888
;
8989
%t0 = zext <8 x i32> %nbits to <8 x i64>
@@ -110,7 +110,7 @@ define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {
110110
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
111111
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
112112
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]
113-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 undef, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 undef, i32 undef>
113+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 poison, i32 poison>
114114
; CHECK-NEXT: ret <8 x i32> [[T5]]
115115
;
116116
%t0 = zext <8 x i32> %nbits to <8 x i64>

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {
9393
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]])
9494
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
9595
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T3]]
96-
; CHECK-NEXT: [[T6:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
96+
; CHECK-NEXT: [[T6:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
9797
; CHECK-NEXT: ret <8 x i32> [[T6]]
9898
;
9999
%t0 = zext <8 x i32> %nbits to <8 x i64>
@@ -124,7 +124,7 @@ define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {
124124
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]])
125125
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>
126126
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T3]]
127-
; CHECK-NEXT: [[T6:%.*]] = and <8 x i32> [[TMP2]], <i32 undef, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 undef, i32 undef>
127+
; CHECK-NEXT: [[T6:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 poison, i32 poison>
128128
; CHECK-NEXT: ret <8 x i32> [[T6]]
129129
;
130130
%t0 = zext <8 x i32> %nbits to <8 x i64>

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-e.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {
8383
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
8484
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X]] to <8 x i32>
8585
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]
86-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
86+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
8787
; CHECK-NEXT: ret <8 x i32> [[T5]]
8888
;
8989
%t0 = zext <8 x i32> %nbits to <8 x i64>
@@ -110,7 +110,7 @@ define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {
110110
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
111111
; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X]] to <8 x i32>
112112
; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]
113-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 undef, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 undef, i32 undef>
113+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 poison, i32 poison>
114114
; CHECK-NEXT: ret <8 x i32> [[T5]]
115115
;
116116
%t0 = zext <8 x i32> %nbits to <8 x i64>

llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ define <8 x i32> @t1_vec_splat_undef(<8 x i32> %x, <8 x i32> %nbits) {
8282
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
8383
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
8484
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T4]]
85-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
85+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>
8686
; CHECK-NEXT: ret <8 x i32> [[T5]]
8787
;
8888
%t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>
@@ -109,7 +109,7 @@ define <8 x i32> @t2_vec_nonsplat(<8 x i32> %x, <8 x i32> %nbits) {
109109
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
110110
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
111111
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T4]]
112-
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 undef, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 undef>
112+
; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 poison, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 poison>
113113
; CHECK-NEXT: ret <8 x i32> [[T5]]
114114
;
115115
%t0 = add <8 x i32> %nbits, <i32 -33, i32 -32, i32 -31, i32 -1, i32 0, i32 1, i32 31, i32 32>

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