[BOLT][AArch64] Add R_*_LD64_GOT*_LO15 rel support

Add R_AARCH64_LD64_GOT*_LO15 to the list of supported relocations.
But due to the fact that JITlink doesn't create GOT section when used
with BOLT and there is no common VK_LO15 relocation for aarch64 don't
record this relocation to further process. Since BOLT doesn't move GOT
table it's OK that instruction would have preserved imm value and not
expression. But this level of support is needed during relocations
processing e.g. to abort on out-of-section GOT symbols (llvm#100801).

Author: yota9

bolt/lib/Core/Relocation.cpp

@@ -75,6 +75,8 @@ static bool isSupportedAArch64(uint64_t Type) {
   case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+  case ELF::R_AARCH64_LD64_GOTOFF_LO15:
   case ELF::R_AARCH64_LD64_GOT_LO12_NC:
   case ELF::R_AARCH64_TLSDESC_LD64_LO12:
   case ELF::R_AARCH64_TLSDESC_ADD_LO12:
@@ -183,6 +185,8 @@ static size_t getSizeForTypeAArch64(uint64_t Type) {
   case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+  case ELF::R_AARCH64_LD64_GOTOFF_LO15:
   case ELF::R_AARCH64_LD64_GOT_LO12_NC:
   case ELF::R_AARCH64_TLSDESC_LD64_LO12:
   case ELF::R_AARCH64_TLSDESC_ADD_LO12:
@@ -464,6 +468,8 @@ static uint64_t extractValueAArch64(uint64_t Type, uint64_t Contents,
     return Contents;
   }
   case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+  case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+  case ELF::R_AARCH64_LD64_GOTOFF_LO15:
   case ELF::R_AARCH64_TLSDESC_LD64_LO12:
   case ELF::R_AARCH64_LD64_GOT_LO12_NC:
   case ELF::R_AARCH64_LDST64_ABS_LO12_NC: {
@@ -609,6 +615,8 @@ static bool isGOTAArch64(uint64_t Type) {
   default:
     return false;
   case ELF::R_AARCH64_ADR_GOT_PAGE:
+  case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+  case ELF::R_AARCH64_LD64_GOTOFF_LO15:
   case ELF::R_AARCH64_LD64_GOT_LO12_NC:
   case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
@@ -716,6 +724,8 @@ static bool isPCRelativeAArch64(uint64_t Type) {
   case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
   case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+  case ELF::R_AARCH64_LD64_GOTOFF_LO15:
   case ELF::R_AARCH64_LD64_GOT_LO12_NC:
   case ELF::R_AARCH64_TLSDESC_LD64_LO12:
   case ELF::R_AARCH64_TLSDESC_ADD_LO12:

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

@@ -1403,6 +1403,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case ELF::R_AARCH64_TLSDESC_CALL:
     case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
     case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+    case ELF::R_AARCH64_LD64_GOTPAGE_LO15:
+    case ELF::R_AARCH64_LD64_GOTOFF_LO15:
       return false;
     default:
       llvm_unreachable("Unexpected AArch64 relocation type in code");

bolt/test/AArch64/got_rels.test

@@ -0,0 +1,23 @@
+// This test checks that got-related relocations are properly handled by BOLT.
+
+# RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown \
+# RUN:   %s -o %t.o
+# RUN: %clang %cflags -fPIC -pie %t.o -o %t.exe -Wl,-q
+# RUN: llvm-bolt %t.exe -o %t.bolt --print-disasm --print-only=_start | \
+# RUN:   FileCheck %s
+
+# CHECK: adrp x1, __BOLT_got_zero{{.*}}
+# CHECK-NEXT: ldr x1, [x1, :lo12:__BOLT_got_zero+{{.*}}]
+# CHECK-NEXT: adrp x1, "_GLOBAL_OFFSET_TABLE_/1"
+# CHECK-NEXT: ldr x1, [x1, #0x{{[[:xdigit:]]+}}]
+
+.text
+.balign 4
+.global _start
+.type _start, %function
+_start:
+  adrp x1, #:got:symbol
+  ldr x1, [x1, #:got_lo12:symbol]
+  adrp x1, _GLOBAL_OFFSET_TABLE_
+  ldr x1, [x1, #:gotpage_lo15:symbol]
+.size _start, .-_start