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phoebewangphoebewang
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[X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (llvm#123275)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
1 parent ccd7795 commit 4f40b07

17 files changed

+1842
-1842
lines changed

‎clang/include/clang/Basic/BuiltinsX86.td

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4987,27 +4987,27 @@ let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] i
49874987
def vminmaxsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant int, _Vector<2, double>, unsigned char, _Constant int)">;
49884988
def vminmaxsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Constant int, _Vector<8, _Float16>, unsigned char, _Constant int)">;
49894989
def vminmaxss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant int, _Vector<4, float>, unsigned char, _Constant int)">;
4990-
def vcvtnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
4990+
def vcvtbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
49914991
}
49924992

49934993
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
4994-
def vcvtnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
4994+
def vcvtbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
49954995
}
49964996

49974997
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
4998-
def vcvtnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
4998+
def vcvtbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
49994999
}
50005000

50015001
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
5002-
def vcvtnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
5002+
def vcvtbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
50035003
}
50045004

50055005
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
5006-
def vcvtnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
5006+
def vcvtbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
50075007
}
50085008

50095009
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
5010-
def vcvtnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
5010+
def vcvtbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
50115011
}
50125012

50135013
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
@@ -5059,27 +5059,27 @@ let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] i
50595059
}
50605060

50615061
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
5062-
def vcvttnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
5062+
def vcvttbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
50635063
}
50645064

50655065
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
5066-
def vcvttnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
5066+
def vcvttbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
50675067
}
50685068

50695069
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
5070-
def vcvttnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
5070+
def vcvttbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
50715071
}
50725072

50735073
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
5074-
def vcvttnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
5074+
def vcvttbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
50755075
}
50765076

50775077
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
5078-
def vcvttnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
5078+
def vcvttbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
50795079
}
50805080

50815081
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
5082-
def vcvttnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
5082+
def vcvttbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
50835083
}
50845084

50855085
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {

‎clang/lib/Headers/avx10_2_512satcvtintrin.h

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -14,56 +14,56 @@
1414
#ifndef __AVX10_2_512SATCVTINTRIN_H
1515
#define __AVX10_2_512SATCVTINTRIN_H
1616

17-
#define _mm512_ipcvtnebf16_epi8(A) \
18-
((__m512i)__builtin_ia32_vcvtnebf162ibs512((__v32bf)(__m512bh)(A)))
17+
#define _mm512_ipcvtbf16_epi8(A) \
18+
((__m512i)__builtin_ia32_vcvtbf162ibs512((__v32bf)(__m512bh)(A)))
1919

20-
#define _mm512_mask_ipcvtnebf16_epi8(W, U, A) \
20+
#define _mm512_mask_ipcvtbf16_epi8(W, U, A) \
2121
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
22-
(__v32hi)_mm512_ipcvtnebf16_epi8(A), \
22+
(__v32hi)_mm512_ipcvtbf16_epi8(A), \
2323
(__v32hi)(__m512i)(W)))
2424

25-
#define _mm512_maskz_ipcvtnebf16_epi8(U, A) \
25+
#define _mm512_maskz_ipcvtbf16_epi8(U, A) \
2626
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
27-
(__v32hi)_mm512_ipcvtnebf16_epi8(A), \
27+
(__v32hi)_mm512_ipcvtbf16_epi8(A), \
2828
(__v32hi)_mm512_setzero_si512()))
2929

30-
#define _mm512_ipcvtnebf16_epu8(A) \
31-
((__m512i)__builtin_ia32_vcvtnebf162iubs512((__v32bf)(__m512bh)(A)))
30+
#define _mm512_ipcvtbf16_epu8(A) \
31+
((__m512i)__builtin_ia32_vcvtbf162iubs512((__v32bf)(__m512bh)(A)))
3232

33-
#define _mm512_mask_ipcvtnebf16_epu8(W, U, A) \
33+
#define _mm512_mask_ipcvtbf16_epu8(W, U, A) \
3434
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
35-
(__v32hi)_mm512_ipcvtnebf16_epu8(A), \
35+
(__v32hi)_mm512_ipcvtbf16_epu8(A), \
3636
(__v32hi)(__m512i)(W)))
3737

38-
#define _mm512_maskz_ipcvtnebf16_epu8(U, A) \
38+
#define _mm512_maskz_ipcvtbf16_epu8(U, A) \
3939
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
40-
(__v32hi)_mm512_ipcvtnebf16_epu8(A), \
40+
(__v32hi)_mm512_ipcvtbf16_epu8(A), \
4141
(__v32hi)_mm512_setzero_si512()))
4242

43-
#define _mm512_ipcvttnebf16_epi8(A) \
44-
((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
43+
#define _mm512_ipcvttbf16_epi8(A) \
44+
((__m512i)__builtin_ia32_vcvttbf162ibs512((__v32bf)(__m512bh)(A)))
4545

46-
#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
46+
#define _mm512_mask_ipcvttbf16_epi8(W, U, A) \
4747
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
48-
(__v32hi)_mm512_ipcvttnebf16_epi8(A), \
48+
(__v32hi)_mm512_ipcvttbf16_epi8(A), \
4949
(__v32hi)(__m512i)(W)))
5050

51-
#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
51+
#define _mm512_maskz_ipcvttbf16_epi8(U, A) \
5252
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
53-
(__v32hi)_mm512_ipcvttnebf16_epi8(A), \
53+
(__v32hi)_mm512_ipcvttbf16_epi8(A), \
5454
(__v32hi)_mm512_setzero_si512()))
5555

56-
#define _mm512_ipcvttnebf16_epu8(A) \
57-
((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
56+
#define _mm512_ipcvttbf16_epu8(A) \
57+
((__m512i)__builtin_ia32_vcvttbf162iubs512((__v32bf)(__m512bh)(A)))
5858

59-
#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
59+
#define _mm512_mask_ipcvttbf16_epu8(W, U, A) \
6060
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
61-
(__v32hi)_mm512_ipcvttnebf16_epu8(A), \
61+
(__v32hi)_mm512_ipcvttbf16_epu8(A), \
6262
(__v32hi)(__m512i)(W)))
6363

64-
#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
64+
#define _mm512_maskz_ipcvttbf16_epu8(U, A) \
6565
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
66-
(__v32hi)_mm512_ipcvttnebf16_epu8(A), \
66+
(__v32hi)_mm512_ipcvttbf16_epu8(A), \
6767
(__v32hi)_mm512_setzero_si512()))
6868

6969
#define _mm512_ipcvtph_epi8(A) \

‎clang/lib/Headers/avx10_2satcvtintrin.h

Lines changed: 48 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -14,54 +14,54 @@
1414
#ifndef __AVX10_2SATCVTINTRIN_H
1515
#define __AVX10_2SATCVTINTRIN_H
1616

17-
#define _mm_ipcvtnebf16_epi8(A) \
18-
((__m128i)__builtin_ia32_vcvtnebf162ibs128((__v8bf)(__m128bh)(A)))
17+
#define _mm_ipcvtbf16_epi8(A) \
18+
((__m128i)__builtin_ia32_vcvtbf162ibs128((__v8bf)(__m128bh)(A)))
1919

20-
#define _mm_mask_ipcvtnebf16_epi8(W, U, A) \
20+
#define _mm_mask_ipcvtbf16_epi8(W, U, A) \
2121
((__m128i)__builtin_ia32_selectw_128( \
22-
(__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epi8(A), (__v8hi)(__m128i)(W)))
22+
(__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epi8(A), (__v8hi)(__m128i)(W)))
2323

24-
#define _mm_maskz_ipcvtnebf16_epi8(U, A) \
24+
#define _mm_maskz_ipcvtbf16_epi8(U, A) \
2525
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
26-
(__v8hi)_mm_ipcvtnebf16_epi8(A), \
26+
(__v8hi)_mm_ipcvtbf16_epi8(A), \
2727
(__v8hi)_mm_setzero_si128()))
2828

29-
#define _mm256_ipcvtnebf16_epi8(A) \
30-
((__m256i)__builtin_ia32_vcvtnebf162ibs256((__v16bf)(__m256bh)(A)))
29+
#define _mm256_ipcvtbf16_epi8(A) \
30+
((__m256i)__builtin_ia32_vcvtbf162ibs256((__v16bf)(__m256bh)(A)))
3131

32-
#define _mm256_mask_ipcvtnebf16_epi8(W, U, A) \
32+
#define _mm256_mask_ipcvtbf16_epi8(W, U, A) \
3333
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
34-
(__v16hi)_mm256_ipcvtnebf16_epi8(A), \
34+
(__v16hi)_mm256_ipcvtbf16_epi8(A), \
3535
(__v16hi)(__m256i)(W)))
3636

37-
#define _mm256_maskz_ipcvtnebf16_epi8(U, A) \
37+
#define _mm256_maskz_ipcvtbf16_epi8(U, A) \
3838
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
39-
(__v16hi)_mm256_ipcvtnebf16_epi8(A), \
39+
(__v16hi)_mm256_ipcvtbf16_epi8(A), \
4040
(__v16hi)_mm256_setzero_si256()))
4141

42-
#define _mm_ipcvtnebf16_epu8(A) \
43-
((__m128i)__builtin_ia32_vcvtnebf162iubs128((__v8bf)(__m128bh)(A)))
42+
#define _mm_ipcvtbf16_epu8(A) \
43+
((__m128i)__builtin_ia32_vcvtbf162iubs128((__v8bf)(__m128bh)(A)))
4444

45-
#define _mm_mask_ipcvtnebf16_epu8(W, U, A) \
45+
#define _mm_mask_ipcvtbf16_epu8(W, U, A) \
4646
((__m128i)__builtin_ia32_selectw_128( \
47-
(__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epu8(A), (__v8hi)(__m128i)(W)))
47+
(__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epu8(A), (__v8hi)(__m128i)(W)))
4848

49-
#define _mm_maskz_ipcvtnebf16_epu8(U, A) \
49+
#define _mm_maskz_ipcvtbf16_epu8(U, A) \
5050
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
51-
(__v8hi)_mm_ipcvtnebf16_epu8(A), \
51+
(__v8hi)_mm_ipcvtbf16_epu8(A), \
5252
(__v8hi)_mm_setzero_si128()))
5353

54-
#define _mm256_ipcvtnebf16_epu8(A) \
55-
((__m256i)__builtin_ia32_vcvtnebf162iubs256((__v16bf)(__m256bh)(A)))
54+
#define _mm256_ipcvtbf16_epu8(A) \
55+
((__m256i)__builtin_ia32_vcvtbf162iubs256((__v16bf)(__m256bh)(A)))
5656

57-
#define _mm256_mask_ipcvtnebf16_epu8(W, U, A) \
57+
#define _mm256_mask_ipcvtbf16_epu8(W, U, A) \
5858
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
59-
(__v16hi)_mm256_ipcvtnebf16_epu8(A), \
59+
(__v16hi)_mm256_ipcvtbf16_epu8(A), \
6060
(__v16hi)(__m256i)(W)))
6161

62-
#define _mm256_maskz_ipcvtnebf16_epu8(U, A) \
62+
#define _mm256_maskz_ipcvtbf16_epu8(U, A) \
6363
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
64-
(__v16hi)_mm256_ipcvtnebf16_epu8(A), \
64+
(__v16hi)_mm256_ipcvtbf16_epu8(A), \
6565
(__v16hi)_mm256_setzero_si256()))
6666

6767
#define _mm_ipcvtph_epi8(A) \
@@ -228,54 +228,54 @@
228228
(__v8su)_mm256_setzero_si256(), \
229229
(__mmask8)(U), (const int)R))
230230

231-
#define _mm_ipcvttnebf16_epi8(A) \
232-
((__m128i)__builtin_ia32_vcvttnebf162ibs128((__v8bf)(__m128bh)(A)))
231+
#define _mm_ipcvttbf16_epi8(A) \
232+
((__m128i)__builtin_ia32_vcvttbf162ibs128((__v8bf)(__m128bh)(A)))
233233

234-
#define _mm_mask_ipcvttnebf16_epi8(W, U, A) \
234+
#define _mm_mask_ipcvttbf16_epi8(W, U, A) \
235235
((__m128i)__builtin_ia32_selectw_128( \
236-
(__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epi8(A), (__v8hi)(__m128i)(W)))
236+
(__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epi8(A), (__v8hi)(__m128i)(W)))
237237

238-
#define _mm_maskz_ipcvttnebf16_epi8(U, A) \
238+
#define _mm_maskz_ipcvttbf16_epi8(U, A) \
239239
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
240-
(__v8hi)_mm_ipcvttnebf16_epi8(A), \
240+
(__v8hi)_mm_ipcvttbf16_epi8(A), \
241241
(__v8hi)_mm_setzero_si128()))
242242

243-
#define _mm256_ipcvttnebf16_epi8(A) \
244-
((__m256i)__builtin_ia32_vcvttnebf162ibs256((__v16bf)(__m256bh)(A)))
243+
#define _mm256_ipcvttbf16_epi8(A) \
244+
((__m256i)__builtin_ia32_vcvttbf162ibs256((__v16bf)(__m256bh)(A)))
245245

246-
#define _mm256_mask_ipcvttnebf16_epi8(W, U, A) \
246+
#define _mm256_mask_ipcvttbf16_epi8(W, U, A) \
247247
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
248-
(__v16hi)_mm256_ipcvttnebf16_epi8(A), \
248+
(__v16hi)_mm256_ipcvttbf16_epi8(A), \
249249
(__v16hi)(__m256i)(W)))
250250

251-
#define _mm256_maskz_ipcvttnebf16_epi8(U, A) \
251+
#define _mm256_maskz_ipcvttbf16_epi8(U, A) \
252252
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
253-
(__v16hi)_mm256_ipcvttnebf16_epi8(A), \
253+
(__v16hi)_mm256_ipcvttbf16_epi8(A), \
254254
(__v16hi)_mm256_setzero_si256()))
255255

256-
#define _mm_ipcvttnebf16_epu8(A) \
257-
((__m128i)__builtin_ia32_vcvttnebf162iubs128((__v8bf)(__m128bh)(A)))
256+
#define _mm_ipcvttbf16_epu8(A) \
257+
((__m128i)__builtin_ia32_vcvttbf162iubs128((__v8bf)(__m128bh)(A)))
258258

259-
#define _mm_mask_ipcvttnebf16_epu8(W, U, A) \
259+
#define _mm_mask_ipcvttbf16_epu8(W, U, A) \
260260
((__m128i)__builtin_ia32_selectw_128( \
261-
(__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epu8(A), (__v8hi)(__m128i)(W)))
261+
(__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epu8(A), (__v8hi)(__m128i)(W)))
262262

263-
#define _mm_maskz_ipcvttnebf16_epu8(U, A) \
263+
#define _mm_maskz_ipcvttbf16_epu8(U, A) \
264264
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
265-
(__v8hi)_mm_ipcvttnebf16_epu8(A), \
265+
(__v8hi)_mm_ipcvttbf16_epu8(A), \
266266
(__v8hi)_mm_setzero_si128()))
267267

268-
#define _mm256_ipcvttnebf16_epu8(A) \
269-
((__m256i)__builtin_ia32_vcvttnebf162iubs256((__v16bf)(__m256bh)(A)))
268+
#define _mm256_ipcvttbf16_epu8(A) \
269+
((__m256i)__builtin_ia32_vcvttbf162iubs256((__v16bf)(__m256bh)(A)))
270270

271-
#define _mm256_mask_ipcvttnebf16_epu8(W, U, A) \
271+
#define _mm256_mask_ipcvttbf16_epu8(W, U, A) \
272272
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
273-
(__v16hi)_mm256_ipcvttnebf16_epu8(A), \
273+
(__v16hi)_mm256_ipcvttbf16_epu8(A), \
274274
(__v16hi)(__m256i)(W)))
275275

276-
#define _mm256_maskz_ipcvttnebf16_epu8(U, A) \
276+
#define _mm256_maskz_ipcvttbf16_epu8(U, A) \
277277
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
278-
(__v16hi)_mm256_ipcvttnebf16_epu8(A), \
278+
(__v16hi)_mm256_ipcvttbf16_epu8(A), \
279279
(__v16hi)_mm256_setzero_si256()))
280280

281281
#define _mm_ipcvttph_epi8(A) \

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