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platform: sifive
platform: sifive
SiFive
platform: Silabs SiM3U
platform: Silabs SiM3U
Silicon Labs SiM3U
platform: Silabs
platform: Silabs
Silicon Labs
platform: STM32
platform: STM32
ST Micro STM32
platform: Synopsys
platform: Synopsys
Synopsys
platform: Telink
platform: Telink
Telink TLSR
platform: Texas Instruments MSPM0
platform: Texas Instruments MSPM0
platform: TI K3
platform: TI K3
Texas Instruments Keystone 3 Processors
platform: TI MSPM0
platform: TI MSPM0
Texas Instruments MSPM0 (Cortex M0+) family of SoC
platform: TI SimpleLink
platform: TI SimpleLink
Texas Instruments SimpleLink MCU
platform: TI
platform: TI
Texas Instruments
platform: WinChipHead
platform: WinChipHead
platform: X86
platform: X86
x86 and x86-64
platform: Xilinx
platform: Xilinx
Xilinx
platforms: Renesas RA
platforms: Renesas RA
platforms: Renesas RZ
platforms: Renesas RZ
priority: high
priority: high
High impact/importance bug
priority: low
priority: low
Low impact/importance bug
priority: medium
priority: medium
Medium impact/importance bug
Process
Process
Tracked by the process WG
python:uv
python:uv
Pull requests that update python:uv code
python
python
Pull requests that update python code
Regression
Regression
Something, which was working, does not anymore
Release Blocker
Release Blocker
Use this label for justified release blockers
Release Notes Required
Release Notes Required
Release notes required for this change
Release Notes
Release Notes
To be mentioned in the release notes
RFC
RFC
Request For Comments: want input from the community
Role Nomination
Role Nomination
Safety
Safety
Tracked by the Safety WG
Security Review
Security Review
To be reviewed by a security expert