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Enable 64-bit bignum limbs and add optimized multiplication for Aarch64 #240

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Merged
merged 4 commits into from
Sep 4, 2019

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Ko-
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@Ko- Ko- commented Sep 2, 2019

This was Mbed-TLS/mbedtls#1964. The CLA was approved and @yanesca and @Patater reviewed this.

Ko- added 4 commits September 2, 2019 13:44
GCC and Clang do not define __ARMCC_VERSION when building for Aarch64.
Yet they should also use 64-bit limbs for Aarch64 builds.
x0-x3 are skipped such that function parameters to not have to be moved.
MULADDC_INIT and MULADDC_STOP are mostly empty because it is more
efficient to keep everything in registers (and that should easily be
possible). I considered a MULADDC_HUIT implementation, but could not
think of something that would be more efficient than basically 8
consecutive MULADDC_CORE. You could combine the loads and stores, but
it's probably more efficient to interleave them with arithmetic,
depending on the specific microarchitecture. NEON allows to do a
64x64->128 bit multiplication (and optional accumulation) in one
instruction, but is not great at handling carries.
@Patater Patater added the enhancement New feature or request label Sep 2, 2019
@Patater Patater self-requested a review September 2, 2019 15:01
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LGTM

@Patater Patater requested a review from yanesca September 3, 2019 11:01
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Patater commented Sep 4, 2019

Thanks for your contribution, @Ko- !

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3 participants