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theotherjimmytheotherjimmy
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Merge pull request #4869 from toyowata/lpc_spi_fix
HAL LPCs SPI: Fix mask bits for SPI clock rate
2 parents 9607441 + da7fa0d commit 1c41a9b

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8 files changed

+16
-16
lines changed

8 files changed

+16
-16
lines changed

‎targets/TARGET_NXP/TARGET_LPC11U6X/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
110110

111111
int FRF = 0; // FRF (frame format) = SPI
112112
uint32_t tmp = obj->spi->CR0;
113-
tmp &= ~(0xFFFF);
113+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
114114
tmp |= DSS << 0
115115
| FRF << 4
116116
| SPO << 6
@@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
146146
obj->spi->CPSR = prescaler;
147147

148148
// divider
149-
obj->spi->CR0 &= ~(0xFFFF << 8);
149+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
150150
obj->spi->CR0 |= (divider - 1) << 8;
151151
ssp_enable(obj);
152152
return;

‎targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
7676

7777
int FRF = 0; // FRF (frame format) = SPI
7878
uint32_t tmp = obj->spi->CR0;
79-
tmp &= ~(0xFFFF);
79+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
8080
tmp |= DSS << 0
8181
| FRF << 4
8282
| SPO << 6
@@ -112,7 +112,7 @@ void spi_frequency(spi_t *obj, int hz) {
112112
obj->spi->CPSR = prescaler;
113113

114114
// divider
115-
obj->spi->CR0 &= ~(0xFFFF << 8);
115+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
116116
obj->spi->CR0 |= (divider - 1) << 8;
117117
ssp_enable(obj);
118118
return;

‎targets/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
112112

113113
int FRF = 0; // FRF (frame format) = SPI
114114
uint32_t tmp = obj->spi->CR0;
115-
tmp &= ~(0xFFFF);
115+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
116116
tmp |= DSS << 0
117117
| FRF << 4
118118
| SPO << 6
@@ -148,7 +148,7 @@ void spi_frequency(spi_t *obj, int hz) {
148148
obj->spi->CPSR = prescaler;
149149

150150
// divider
151-
obj->spi->CR0 &= ~(0xFFFF << 8);
151+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
152152
obj->spi->CR0 |= (divider - 1) << 8;
153153
ssp_enable(obj);
154154
return;

‎targets/TARGET_NXP/TARGET_LPC13XX/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
104104

105105
int FRF = 0; // FRF (frame format) = SPI
106106
uint32_t tmp = obj->spi->CR0;
107-
tmp &= ~(0xFFFF);
107+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
108108
tmp |= DSS << 0
109109
| FRF << 4
110110
| SPO << 6
@@ -140,7 +140,7 @@ void spi_frequency(spi_t *obj, int hz) {
140140
obj->spi->CPSR = prescaler;
141141

142142
// divider
143-
obj->spi->CR0 &= ~(0xFFFF << 8);
143+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
144144
obj->spi->CR0 |= (divider - 1) << 8;
145145
ssp_enable(obj);
146146
return;

‎targets/TARGET_NXP/TARGET_LPC176X/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
9898

9999
int FRF = 0; // FRF (frame format) = SPI
100100
uint32_t tmp = obj->spi->CR0;
101-
tmp &= ~(0xFFFF);
101+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
102102
tmp |= DSS << 0
103103
| FRF << 4
104104
| SPO << 6
@@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
146146
obj->spi->CPSR = prescaler;
147147

148148
// divider
149-
obj->spi->CR0 &= ~(0xFFFF << 8);
149+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
150150
obj->spi->CR0 |= (divider - 1) << 8;
151151
ssp_enable(obj);
152152
return;

‎targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
118118

119119
int FRF = 0; // FRF (frame format) = SPI
120120
uint32_t tmp = obj->spi->CR0;
121-
tmp &= ~(0xFFFF);
121+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
122122
tmp |= DSS << 0
123123
| FRF << 4
124124
| SPO << 6
@@ -153,7 +153,7 @@ void spi_frequency(spi_t *obj, int hz) {
153153
obj->spi->CPSR = prescaler;
154154

155155
// divider
156-
obj->spi->CR0 &= ~(0xFFFF << 8);
156+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
157157
obj->spi->CR0 |= (divider - 1) << 8;
158158
ssp_enable(obj);
159159
return;

‎targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
9898

9999
int FRF = 0; // FRF (frame format) = SPI
100100
uint32_t tmp = obj->spi->CR0;
101-
tmp &= ~(0xFFFF);
101+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
102102
tmp |= DSS << 0
103103
| FRF << 4
104104
| SPO << 6
@@ -133,7 +133,7 @@ void spi_frequency(spi_t *obj, int hz) {
133133
obj->spi->CPSR = prescaler;
134134

135135
// divider
136-
obj->spi->CR0 &= ~(0xFFFF << 8);
136+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
137137
obj->spi->CR0 |= (divider - 1) << 8;
138138
ssp_enable(obj);
139139
return;

‎targets/TARGET_NXP/TARGET_LPC43XX/spi_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
117117

118118
int FRF = 0; // FRF (frame format) = SPI
119119
uint32_t tmp = obj->spi->CR0;
120-
tmp &= ~(0xFFFF);
120+
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
121121
tmp |= DSS << 0
122122
| FRF << 4
123123
| SPO << 6
@@ -152,7 +152,7 @@ void spi_frequency(spi_t *obj, int hz) {
152152
obj->spi->CPSR = prescaler;
153153

154154
// divider
155-
obj->spi->CR0 &= ~(0xFFFF << 8);
155+
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
156156
obj->spi->CR0 |= (divider - 1) << 8;
157157
ssp_enable(obj);
158158
return;

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