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Merge pull request #3767 from OpenNuvoton/nuvoton
[NUC472] Support no-XRAM configuration
2 parents 094fab4 + 0bd8fb2 commit 1ee18b4

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10 files changed

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-4
lines changed

10 files changed

+366
-4
lines changed

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/NUC472.sct renamed to ‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct

File renamed without changes.

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
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LR_IROM1 0x00000000 {
3+
ER_IROM1 0x00000000 { ; load address = execution address
4+
*(RESET, +First)
5+
*(InRoot$$Sections)
6+
.ANY (+RO)
7+
}
8+
9+
;UVISOR AlignExpr(+0, 16) { ; 16 byte-aligned
10+
; uvisor-lib.a (+RW +ZI)
11+
;}
12+
13+
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
14+
}
15+
16+
ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 142)) { ; Reserve for vectors
17+
}
18+
19+
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
20+
.ANY (+RW +ZI)
21+
}
22+
23+
; Extern SRAM for HEAP
24+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
25+
}
26+
}
27+
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
28+
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
29+

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/NUC472.sct renamed to ‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct

File renamed without changes.

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
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LR_IROM1 0x00000000 {
3+
ER_IROM1 0x00000000 { ; load address = execution address
4+
*(RESET, +First)
5+
*(InRoot$$Sections)
6+
.ANY (+RO)
7+
}
8+
9+
;UVISOR AlignExpr(+0, 16) { ; 16 byte-aligned
10+
; uvisor-lib.a (+RW +ZI)
11+
;}
12+
13+
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
14+
}
15+
16+
ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 142)) { ; Reserve for vectors
17+
}
18+
19+
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
20+
.ANY (+RW +ZI)
21+
}
22+
23+
; Extern SRAM for HEAP
24+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
25+
}
26+
}
27+
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
28+
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
29+

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/NUC472.ld renamed to ‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld

File renamed without changes.

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld

Lines changed: 268 additions & 0 deletions
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/*
2+
* Nuvoton NUC472 GCC linker script file
3+
*/
4+
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StackSize = 0x800;
6+
7+
MEMORY
8+
{
9+
10+
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
11+
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400
12+
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000
13+
}
14+
15+
/**
16+
* Must match cmsis_nvic.h
17+
*/
18+
__vector_size = 4 * (16 + 142);
19+
20+
/* Linker script to place sections and symbol values. Should be used together
21+
* with other linker script that defines memory regions FLASH and RAM.
22+
* It references following symbols, which must be defined in code:
23+
* Reset_Handler : Entry of reset handler
24+
*
25+
* It defines following symbols, which code can use without definition:
26+
* __exidx_start
27+
* __exidx_end
28+
* __etext
29+
* __data_start__
30+
* __preinit_array_start
31+
* __preinit_array_end
32+
* __init_array_start
33+
* __init_array_end
34+
* __fini_array_start
35+
* __fini_array_end
36+
* __data_end__
37+
* __bss_start__
38+
* __bss_end__
39+
* __end__
40+
* end
41+
* __HeapLimit
42+
* __StackLimit
43+
* __StackTop
44+
* __stack
45+
*/
46+
ENTRY(Reset_Handler)
47+
48+
SECTIONS
49+
{
50+
.isr_vector :
51+
{
52+
__vector_table = .;
53+
KEEP(*(.vector_table))
54+
. = ALIGN(4);
55+
} > VECTORS
56+
57+
/* ensure that uvisor bss is at the beginning of memory */
58+
.uvisor.bss (NOLOAD):
59+
{
60+
. = ALIGN(32);
61+
__uvisor_bss_start = .;
62+
63+
/* protected uvisor main bss */
64+
. = ALIGN(32);
65+
__uvisor_bss_main_start = .;
66+
KEEP(*(.keep.uvisor.bss.main))
67+
. = ALIGN(32);
68+
__uvisor_bss_main_end = .;
69+
70+
/* protected uvisor secure boxes bss */
71+
. = ALIGN(32);
72+
__uvisor_bss_boxes_start = .;
73+
KEEP(*(.keep.uvisor.bss.boxes))
74+
. = ALIGN(32);
75+
__uvisor_bss_boxes_end = .;
76+
77+
/* Ensure log2(size) alignment of the uvisor region, to ensure that the region can be effectively protected by the MPU. */
78+
. = ALIGN(1 << LOG2CEIL(__uvisor_bss_boxes_end - __uvisor_bss_start));
79+
__uvisor_bss_end = .;
80+
} > RAM_INTERN
81+
82+
.text :
83+
{
84+
/* uVisor code and data */
85+
. = ALIGN(4);
86+
__uvisor_main_start = .;
87+
*(.uvisor.main)
88+
__uvisor_main_end = .;
89+
90+
*(.text*)
91+
92+
KEEP(*(.init))
93+
KEEP(*(.fini))
94+
95+
/* .ctors */
96+
*crtbegin.o(.ctors)
97+
*crtbegin?.o(.ctors)
98+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
99+
*(SORT(.ctors.*))
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*(.ctors)
101+
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/* .dtors */
103+
*crtbegin.o(.dtors)
104+
*crtbegin?.o(.dtors)
105+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
106+
*(SORT(.dtors.*))
107+
*(.dtors)
108+
109+
*(.rodata*)
110+
111+
KEEP(*(.eh_frame*))
112+
} > FLASH
113+
114+
.ARM.extab :
115+
{
116+
*(.ARM.extab* .gnu.linkonce.armextab.*)
117+
} > FLASH
118+
119+
.ARM.exidx :
120+
{
121+
__exidx_start = .;
122+
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
123+
__exidx_end = .;
124+
} > FLASH
125+
126+
/* .stack section doesn't contains any symbols. It is only
127+
* used for linker to reserve space for the main stack section
128+
* WARNING: .stack should come immediately after the last secure memory
129+
* section. This provides stack overflow detection. */
130+
.stack (NOLOAD):
131+
{
132+
__StackLimit = .;
133+
*(.stack*);
134+
. += StackSize - (. - __StackLimit);
135+
} > RAM_INTERN
136+
137+
/* Set stack top to end of RAM, and stack limit move down by
138+
* size of stack_dummy section */
139+
__StackTop = ADDR(.stack) + SIZEOF(.stack);
140+
__StackLimit = ADDR(.stack);
141+
PROVIDE(__stack = __StackTop);
142+
143+
/* Relocate vector table in SRAM */
144+
.isr_vector.reloc (NOLOAD) :
145+
{
146+
. = ALIGN(1 << LOG2CEIL(__vector_size));
147+
PROVIDE(__start_vector_table__ = .);
148+
. += __vector_size;
149+
PROVIDE(__end_vector_table__ = .);
150+
} > RAM_INTERN
151+
152+
.data :
153+
{
154+
PROVIDE( __etext = LOADADDR(.data) );
155+
156+
__data_start__ = .;
157+
*(vtable)
158+
*(.data*)
159+
160+
. = ALIGN(4);
161+
/* preinit data */
162+
PROVIDE_HIDDEN (__preinit_array_start = .);
163+
KEEP(*(.preinit_array))
164+
PROVIDE_HIDDEN (__preinit_array_end = .);
165+
166+
. = ALIGN(4);
167+
/* init data */
168+
PROVIDE_HIDDEN (__init_array_start = .);
169+
KEEP(*(SORT(.init_array.*)))
170+
KEEP(*(.init_array))
171+
PROVIDE_HIDDEN (__init_array_end = .);
172+
173+
. = ALIGN(4);
174+
/* finit data */
175+
PROVIDE_HIDDEN (__fini_array_start = .);
176+
KEEP(*(SORT(.fini_array.*)))
177+
KEEP(*(.fini_array))
178+
PROVIDE_HIDDEN (__fini_array_end = .);
179+
180+
/* All data end */
181+
. = ALIGN(32);
182+
__data_end__ = .;
183+
184+
} >RAM_INTERN AT>FLASH
185+
186+
/* uvisor configuration data */
187+
.uvisor.secure :
188+
{
189+
. = ALIGN(32);
190+
__uvisor_secure_start = .;
191+
192+
/* uvisor secure boxes configuration tables */
193+
. = ALIGN(32);
194+
__uvisor_cfgtbl_start = .;
195+
KEEP(*(.keep.uvisor.cfgtbl))
196+
. = ALIGN(32);
197+
__uvisor_cfgtbl_end = .;
198+
199+
/* pointers to uvisor secure boxes configuration tables */
200+
/* note: no further alignment here, we need to have the exact list of pointers */
201+
__uvisor_cfgtbl_ptr_start = .;
202+
KEEP(*(.keep.uvisor.cfgtbl_ptr_first))
203+
KEEP(*(.keep.uvisor.cfgtbl_ptr))
204+
__uvisor_cfgtbl_ptr_end = .;
205+
206+
/* the following symbols are kept for backward compatibility and will be soon
207+
* deprecated; applications actively using uVisor (__uvisor_mode == UVISOR_ENABLED)
208+
* will need to use uVisor 0.8.x or above, or the security assertions will halt the
209+
* system */
210+
/************************/
211+
__uvisor_data_src = .;
212+
__uvisor_data_start = .;
213+
__uvisor_data_end = .;
214+
/************************/
215+
216+
. = ALIGN(32);
217+
__uvisor_secure_end = .;
218+
} >FLASH
219+
220+
.uninitialized (NOLOAD):
221+
{
222+
. = ALIGN(32);
223+
__uninitialized_start = .;
224+
*(.uninitialized)
225+
KEEP(*(.keep.uninitialized))
226+
. = ALIGN(32);
227+
__uninitialized_end = .;
228+
} > RAM_INTERN
229+
230+
.bss.extern (NOLOAD):
231+
{
232+
__bss_extern_start__ = .;
233+
/**
234+
* Place large .bss* sections into external SRAM if internal SRAM is insufficient.
235+
* Such memory arrangement requires initializing .bss.extern section to zero in startup file. Check startup fiile in cmsis-core-* for support or not.
236+
*/
237+
*lwip_*.o(.bss*)
238+
*lwip_*.o(COMMON)
239+
*mesh_system.o(.bss*)
240+
__bss_extern_end__ = .;
241+
} > RAM_INTERN
242+
243+
.bss (NOLOAD):
244+
{
245+
__bss_start__ = .;
246+
*(.bss*)
247+
*(COMMON)
248+
__bss_end__ = .;
249+
} > RAM_INTERN
250+
251+
.heap (NOLOAD):
252+
{
253+
__end__ = .;
254+
end = __end__;
255+
*(.heap*);
256+
. += (ORIGIN(RAM_INTERN) + LENGTH(RAM_INTERN) - .);
257+
__HeapLimit = .;
258+
} > RAM_INTERN
259+
PROVIDE(__heap_size = SIZEOF(.heap));
260+
PROVIDE(__mbed_sbrk_start = ADDR(.heap));
261+
PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));
262+
263+
/* Provide physical memory boundaries for uVisor. */
264+
__uvisor_flash_start = ORIGIN(VECTORS);
265+
__uvisor_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
266+
__uvisor_sram_start = ORIGIN(RAM_INTERN);
267+
__uvisor_sram_end = ORIGIN(RAM_INTERN) + LENGTH(RAM_INTERN);
268+
}

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/NUC472_442.icf renamed to ‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf

File renamed without changes.

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf

Lines changed: 36 additions & 0 deletions
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@@ -0,0 +1,36 @@
1+
/*###ICF### Section handled by ICF editor, don't touch! ****/
2+
/*-Editor annotation file-*/
3+
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
/*-Specials-*/
5+
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
6+
/*-Memory Regions-*/
7+
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
8+
define symbol __ICFEDIT_region_ROM_end__ = 0x00080000;
9+
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
10+
define symbol __ICFEDIT_region_IRAM_end__ = 0x20010000;
11+
/*-Sizes-*/
12+
define symbol __ICFEDIT_size_cstack__ = 0x800;
13+
define symbol __ICFEDIT_size_heap__ = 0x8000;
14+
/**** End of ICF editor section. ###ICF###*/
15+
16+
17+
define memory mem with size = 4G;
18+
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19+
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
20+
21+
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22+
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23+
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
24+
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { };
25+
26+
27+
initialize by copy { readwrite };
28+
do not initialize { section .noinit };
29+
30+
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
31+
32+
place in ROM_region { readonly };
33+
place at start of IRAM_region { block CSTACK };
34+
place in IRAM_region { block IRAMVEC };
35+
place in IRAM_region { readwrite };
36+
place in IRAM_region { block HEAP };

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/system_NUC472_442.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ uint32_t SystemCoreClock = __HSI; /*!< System Clock Frequency (Cor
1919
uint32_t CyclesPerUs = (__HSI / 1000000); /*!< Cycles per micro second */
2020
uint32_t gau32ClkSrcTbl[] = {__HXT, __LXT, 0, __LIRC, 0, 0, 0, __HIRC}; /*!< System clock source table */
2121

22-
#if defined TARGET_NUMAKER_PFM_NUC472
22+
#if defined TARGET_NU_XRAM_SUPPORTED
2323
static void nu_ebi_init(void);
2424
#endif
2525

@@ -113,13 +113,13 @@ void SystemInit (void)
113113
/*------------------------------------------------------------------------*/
114114
#endif
115115

116-
#if defined TARGET_NUMAKER_PFM_NUC472
116+
#if defined TARGET_NU_XRAM_SUPPORTED
117117
// NOTE: C-runtime not initialized yet. Ensure no static memory (global variable) are accessed in this function.
118118
nu_ebi_init();
119119
#endif
120120
}
121121

122-
#if defined TARGET_NUMAKER_PFM_NUC472
122+
#if defined TARGET_NU_XRAM_SUPPORTED
123123
void nu_ebi_init(void)
124124
{
125125
/* Enable IP clock */

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