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Cruz Monrreal
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Merge pull request #7088 from bcostm/dev_F7_flash_dual_bank
STM32F76x: Add support of dual bank flash mode
2 parents 5e8a0a8 + b79be41 commit 23bc4e0

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4 files changed

+195
-71
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4 files changed

+195
-71
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‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/flash_data.h

Lines changed: 60 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -35,26 +35,65 @@
3535

3636
#if DEVICE_FLASH
3737

38-
/* Exported types ------------------------------------------------------------*/
39-
/* Exported constants --------------------------------------------------------*/
40-
/* Exported macro ------------------------------------------------------------*/
41-
/* FLASH SIZE */
42-
#define FLASH_SIZE (uint32_t) 0x200000
43-
44-
/* We're considering the default reset SINGLE BANK CONFIGURATION ONLY */
45-
/* Base address of the Flash sectors Bank 1 */
46-
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 32 Kbytes */
47-
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base @ of Sector 1, 32 Kbytes */
48-
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base @ of Sector 2, 32 Kbytes */
49-
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base @ of Sector 3, 32 Kbytes */
50-
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base @ of Sector 4, 128 Kbytes */
51-
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base @ of Sector 5, 256 Kbytes */
52-
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base @ of Sector 6, 256 Kbytes */
53-
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base @ of Sector 7, 256 Kbytes */
54-
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08100000) /* Base @ of Sector 8, 256 Kbytes */
55-
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x08140000) /* Base @ of Sector 9, 256 Kbytes */
56-
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x08180000) /* Base @ of Sector 10, 256 Kbytes */
57-
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x081C0000) /* Base @ of Sector 11, 256 Kbytes */
38+
#define FLASH_SIZE ((uint32_t)0x200000)
39+
40+
//=====================================================================
41+
// The Single Bank mode is selected by default.
42+
// To enable the Dual Bank mode you have to:
43+
// 1) enable the FLASH_DUAL_BANK configuration using a json file
44+
// 2) enable the nDBANK option byte using STLink-Utility software
45+
//=====================================================================
46+
#if MBED_CONF_TARGET_FLASH_DUAL_BANK
47+
48+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */
49+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */
50+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base address of Sector 2, 16 Kbytes */
51+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base address of Sector 3, 16 Kbytes */
52+
53+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base address of Sector 4, 64 Kbytes */
54+
55+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base address of Sector 5, 128 Kbytes */
56+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base address of Sector 6, 128 Kbytes */
57+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base address of Sector 7, 128 Kbytes */
58+
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base address of Sector 8, 128 Kbytes */
59+
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base address of Sector 9, 128 Kbytes */
60+
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base address of Sector 10, 128 Kbytes */
61+
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base address of Sector 11, 128 Kbytes */
62+
63+
#define ADDR_FLASH_SECTOR_12 ((uint32_t)0x08100000) /* Base address of Sector 12, 16 Kbytes */
64+
#define ADDR_FLASH_SECTOR_13 ((uint32_t)0x08104000) /* Base address of Sector 13, 16 Kbytes */
65+
#define ADDR_FLASH_SECTOR_14 ((uint32_t)0x08108000) /* Base address of Sector 14, 16 Kbytes */
66+
#define ADDR_FLASH_SECTOR_15 ((uint32_t)0x0810C000) /* Base address of Sector 15, 16 Kbytes */
67+
68+
#define ADDR_FLASH_SECTOR_16 ((uint32_t)0x08110000) /* Base address of Sector 16, 64 Kbytes */
69+
70+
#define ADDR_FLASH_SECTOR_17 ((uint32_t)0x08120000) /* Base address of Sector 17, 128 Kbytes */
71+
#define ADDR_FLASH_SECTOR_18 ((uint32_t)0x08140000) /* Base address of Sector 18, 128 Kbytes */
72+
#define ADDR_FLASH_SECTOR_19 ((uint32_t)0x08160000) /* Base address of Sector 19, 128 Kbytes */
73+
#define ADDR_FLASH_SECTOR_20 ((uint32_t)0x08180000) /* Base address of Sector 20, 128 Kbytes */
74+
#define ADDR_FLASH_SECTOR_21 ((uint32_t)0x081A0000) /* Base address of Sector 21, 128 Kbytes */
75+
#define ADDR_FLASH_SECTOR_22 ((uint32_t)0x081C0000) /* Base address of Sector 22, 128 Kbytes */
76+
#define ADDR_FLASH_SECTOR_23 ((uint32_t)0x081E0000) /* Base address of Sector 23, 128 Kbytes */
77+
78+
#else // SINGLE BANK
79+
80+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base address of Sector 0, 32 Kbytes */
81+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base address of Sector 1, 32 Kbytes */
82+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base address of Sector 2, 32 Kbytes */
83+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base address of Sector 3, 32 Kbytes */
84+
85+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base address of Sector 4, 128 Kbytes */
86+
87+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base address of Sector 5, 256 Kbytes */
88+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base address of Sector 6, 256 Kbytes */
89+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base address of Sector 7, 256 Kbytes */
90+
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08100000) /* Base address of Sector 8, 256 Kbytes */
91+
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x08140000) /* Base address of Sector 9, 256 Kbytes */
92+
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x08180000) /* Base address of Sector 10, 256 Kbytes */
93+
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x081C0000) /* Base address of Sector 11, 256 Kbytes */
94+
95+
#endif // MBED_CONF_TARGET_FLASH_DUAL_BANK
96+
97+
#endif // DEVICE_FLASH
5898

59-
#endif
6099
#endif

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/flash_data.h

Lines changed: 60 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -35,26 +35,65 @@
3535

3636
#if DEVICE_FLASH
3737

38-
/* Exported types ------------------------------------------------------------*/
39-
/* Exported constants --------------------------------------------------------*/
40-
/* Exported macro ------------------------------------------------------------*/
41-
/* FLASH SIZE */
42-
#define FLASH_SIZE (uint32_t) 0x200000
43-
44-
/* We're considering the default reset SINGLE BANK CONFIGURATION ONLY */
45-
/* Base address of the Flash sectors Bank 1 */
46-
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 32 Kbytes */
47-
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base @ of Sector 1, 32 Kbytes */
48-
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base @ of Sector 2, 32 Kbytes */
49-
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base @ of Sector 3, 32 Kbytes */
50-
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base @ of Sector 4, 128 Kbytes */
51-
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base @ of Sector 5, 256 Kbytes */
52-
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base @ of Sector 6, 256 Kbytes */
53-
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base @ of Sector 7, 256 Kbytes */
54-
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08100000) /* Base @ of Sector 8, 256 Kbytes */
55-
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x08140000) /* Base @ of Sector 9, 256 Kbytes */
56-
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x08180000) /* Base @ of Sector 10, 256 Kbytes */
57-
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x081C0000) /* Base @ of Sector 11, 256 Kbytes */
38+
#define FLASH_SIZE ((uint32_t)0x200000)
39+
40+
//=====================================================================
41+
// The Single Bank mode is selected by default.
42+
// To enable the Dual Bank mode you have to:
43+
// 1) enable the FLASH_DUAL_BANK configuration using a json file
44+
// 2) enable the nDBANK option byte using STLink-Utility software
45+
//=====================================================================
46+
#if MBED_CONF_TARGET_FLASH_DUAL_BANK
47+
48+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */
49+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */
50+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base address of Sector 2, 16 Kbytes */
51+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base address of Sector 3, 16 Kbytes */
52+
53+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base address of Sector 4, 64 Kbytes */
54+
55+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base address of Sector 5, 128 Kbytes */
56+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base address of Sector 6, 128 Kbytes */
57+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base address of Sector 7, 128 Kbytes */
58+
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base address of Sector 8, 128 Kbytes */
59+
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base address of Sector 9, 128 Kbytes */
60+
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base address of Sector 10, 128 Kbytes */
61+
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base address of Sector 11, 128 Kbytes */
62+
63+
#define ADDR_FLASH_SECTOR_12 ((uint32_t)0x08100000) /* Base address of Sector 12, 16 Kbytes */
64+
#define ADDR_FLASH_SECTOR_13 ((uint32_t)0x08104000) /* Base address of Sector 13, 16 Kbytes */
65+
#define ADDR_FLASH_SECTOR_14 ((uint32_t)0x08108000) /* Base address of Sector 14, 16 Kbytes */
66+
#define ADDR_FLASH_SECTOR_15 ((uint32_t)0x0810C000) /* Base address of Sector 15, 16 Kbytes */
67+
68+
#define ADDR_FLASH_SECTOR_16 ((uint32_t)0x08110000) /* Base address of Sector 16, 64 Kbytes */
69+
70+
#define ADDR_FLASH_SECTOR_17 ((uint32_t)0x08120000) /* Base address of Sector 17, 128 Kbytes */
71+
#define ADDR_FLASH_SECTOR_18 ((uint32_t)0x08140000) /* Base address of Sector 18, 128 Kbytes */
72+
#define ADDR_FLASH_SECTOR_19 ((uint32_t)0x08160000) /* Base address of Sector 19, 128 Kbytes */
73+
#define ADDR_FLASH_SECTOR_20 ((uint32_t)0x08180000) /* Base address of Sector 20, 128 Kbytes */
74+
#define ADDR_FLASH_SECTOR_21 ((uint32_t)0x081A0000) /* Base address of Sector 21, 128 Kbytes */
75+
#define ADDR_FLASH_SECTOR_22 ((uint32_t)0x081C0000) /* Base address of Sector 22, 128 Kbytes */
76+
#define ADDR_FLASH_SECTOR_23 ((uint32_t)0x081E0000) /* Base address of Sector 23, 128 Kbytes */
77+
78+
#else // SINGLE BANK
79+
80+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base address of Sector 0, 32 Kbytes */
81+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base address of Sector 1, 32 Kbytes */
82+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base address of Sector 2, 32 Kbytes */
83+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base address of Sector 3, 32 Kbytes */
84+
85+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base address of Sector 4, 128 Kbytes */
86+
87+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base address of Sector 5, 256 Kbytes */
88+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base address of Sector 6, 256 Kbytes */
89+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base address of Sector 7, 256 Kbytes */
90+
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08100000) /* Base address of Sector 8, 256 Kbytes */
91+
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x08140000) /* Base address of Sector 9, 256 Kbytes */
92+
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x08180000) /* Base address of Sector 10, 256 Kbytes */
93+
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x081C0000) /* Base address of Sector 11, 256 Kbytes */
94+
95+
#endif // MBED_CONF_TARGET_FLASH_DUAL_BANK
96+
97+
#endif // DEVICE_FLASH
5898

59-
#endif
6099
#endif

‎targets/TARGET_STM/TARGET_STM32F7/flash_api.c

Lines changed: 67 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -32,14 +32,43 @@
3232
#include "flash_api.h"
3333
#include "flash_data.h"
3434
#include "platform/mbed_critical.h"
35+
#include "mbed_error.h"
3536

3637
static uint32_t GetSector(uint32_t Address);
3738
static uint32_t GetSectorSize(uint32_t Sector);
3839

3940
int32_t flash_init(flash_t *obj)
4041
{
42+
// Check Dual Bank option byte (nDBANK) on devices supporting both single and dual bank configurations
43+
#ifdef FLASH_OPTCR_nDBANK
44+
FLASH_OBProgramInitTypeDef OBInit;
45+
/* Allow Access to option bytes sector */
46+
HAL_FLASH_OB_Unlock();
47+
/* Get the Dual bank configuration status */
48+
HAL_FLASHEx_OBGetConfig(&OBInit);
49+
/* Allow Access to option bytes sector */
50+
HAL_FLASH_OB_Lock();
51+
#if MBED_CONF_TARGET_FLASH_DUAL_BANK
52+
if ((OBInit.USERConfig & OB_NDBANK_SINGLE_BANK) == OB_NDBANK_SINGLE_BANK)
53+
{
54+
error("The Dual Bank mode option byte (nDBANK) must be enabled (box unchecked)\n");
55+
return -1;
56+
}
57+
#else // SINGLE BANK
58+
if ((OBInit.USERConfig & OB_NDBANK_SINGLE_BANK) == OB_NDBANK_DUAL_BANK)
59+
{
60+
error("The Dual Bank mode option byte (nDBANK) must be disabled (box checked)\n");
61+
return -1;
62+
}
63+
#endif
64+
#else // Devices supporting Single Bank only
65+
#if MBED_CONF_TARGET_FLASH_DUAL_BANK
66+
#error "The Dual Bank configuration is not supported on this device."
67+
#endif
68+
#endif
4169
return 0;
4270
}
71+
4372
int32_t flash_free(flash_t *obj)
4473
{
4574
return 0;
@@ -70,7 +99,6 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
7099
{
71100
/* Variable used for Erase procedure */
72101
FLASH_EraseInitTypeDef EraseInitStruct;
73-
FLASH_OBProgramInitTypeDef OBInit;
74102
uint32_t SectorId;
75103
uint32_t SectorError = 0;
76104
int32_t status = 0;
@@ -94,24 +122,7 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
94122
/* Get the 1st sector to erase */
95123
SectorId = GetSector(address);
96124

97-
/* Allow Access to option bytes sector */
98-
HAL_FLASH_OB_Unlock();
99-
/* Get the Dual bank configuration status */
100-
HAL_FLASHEx_OBGetConfig(&OBInit);
101-
/* Allow Access to option bytes sector */
102-
HAL_FLASH_OB_Lock();
103-
104-
#if defined (FLASH_OPTCR_nDBANK)
105-
/* On targets that support dynamic single or dual bank configuration
106-
* Check that we're in SINGLE Bank mode, only supported mode now.
107-
*/
108-
if((OBInit.USERConfig & OB_NDBANK_SINGLE_BANK) != OB_NDBANK_SINGLE_BANK) {
109-
/* We don't support the DUAL BANK MODE for now, so return error */
110-
return -1;
111-
}
112-
#endif
113-
114-
/* Fill EraseInit structure*/
125+
/* Fill EraseInit structure */
115126
EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
116127
EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3;
117128
EraseInitStruct.Sector = SectorId;
@@ -196,17 +207,32 @@ static uint32_t GetSector(uint32_t address)
196207
{
197208
uint32_t sector = 0;
198209
uint32_t tmp = address - ADDR_FLASH_SECTOR_0;
199-
200-
if (address < ADDR_FLASH_SECTOR_4) {
201-
// 32k sectorsize
202-
sector += tmp >>15;
203-
} else if (address < ADDR_FLASH_SECTOR_5) {
204-
//64k sector size
210+
#if (MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
211+
if (address < ADDR_FLASH_SECTOR_4) { // Sectors 0 to 3
212+
sector += tmp >> 14;
213+
} else if (address < ADDR_FLASH_SECTOR_5) { // Sector 4
205214
sector += FLASH_SECTOR_4;
206-
} else {
207-
sector += 4 + (tmp >>18);
215+
} else if (address < ADDR_FLASH_SECTOR_12) { // Sectors 5 to 11
216+
sector += 4 + (tmp >> 17);
217+
} else if (address < ADDR_FLASH_SECTOR_16) { // Sectors 12 to 15
218+
tmp = address - ADDR_FLASH_SECTOR_12;
219+
sector += 12 + (tmp >> 14);
220+
} else if (address < ADDR_FLASH_SECTOR_17) { // Sector 16
221+
sector += FLASH_SECTOR_16;
208222
}
209-
223+
else { // Sectors 17 to 23
224+
tmp = address - ADDR_FLASH_SECTOR_12;
225+
sector += 16 + (tmp >> 17);
226+
}
227+
#else // SINGLE BANK
228+
if (address < ADDR_FLASH_SECTOR_4) { // Sectors 0 to 3
229+
sector += tmp >> 15;
230+
} else if (address < ADDR_FLASH_SECTOR_5) { // Sector 4
231+
sector += FLASH_SECTOR_4;
232+
} else { // Sectors 5 to 11
233+
sector += 4 + (tmp >> 18);
234+
}
235+
#endif
210236
return sector;
211237
}
212238

@@ -218,6 +244,18 @@ static uint32_t GetSector(uint32_t address)
218244
static uint32_t GetSectorSize(uint32_t Sector)
219245
{
220246
uint32_t sectorsize = 0x00;
247+
#if (MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
248+
if ((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) ||\
249+
(Sector == FLASH_SECTOR_2) || (Sector == FLASH_SECTOR_3) ||\
250+
(Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) ||\
251+
(Sector == FLASH_SECTOR_14) || (Sector == FLASH_SECTOR_15)) {
252+
sectorsize = 16 * 1024;
253+
} else if ((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)) {
254+
sectorsize = 64 * 1024;
255+
} else {
256+
sectorsize = 128 * 1024;
257+
}
258+
#else // SINGLE BANK
221259
if ((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) ||\
222260
(Sector == FLASH_SECTOR_2) || (Sector == FLASH_SECTOR_3)) {
223261
sectorsize = 32 * 1024;
@@ -226,7 +264,7 @@ static uint32_t GetSectorSize(uint32_t Sector)
226264
} else {
227265
sectorsize = 256 * 1024;
228266
}
229-
267+
#endif
230268
return sectorsize;
231269
}
232270

‎targets/targets.json

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1435,6 +1435,10 @@
14351435
"core": "Cortex-M7FD",
14361436
"extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI", "STM_EMAC"],
14371437
"config": {
1438+
"flash_dual_bank": {
1439+
"help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
1440+
"value": "0"
1441+
},
14381442
"d11_configuration": {
14391443
"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
14401444
"value": "PA_7",
@@ -1936,6 +1940,10 @@
19361940
"extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI", "STM_EMAC"],
19371941
"supported_form_factors": ["ARDUINO"],
19381942
"config": {
1943+
"flash_dual_bank": {
1944+
"help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
1945+
"value": "0"
1946+
},
19391947
"clock_source": {
19401948
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
19411949
"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",

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