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Merge pull request #4351 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_L4_V1.8.0
STM32L4 cube update from v1.5.0 to v1.8.0
2 parents 73d1745 + 5dc49b7 commit 2500ab0

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targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_stm32l4xx.c

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@@ -2,8 +2,8 @@
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******************************************************************************
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* @file system_stm32l4xx.c
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* @author MCD Application Team
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* @version V1.1.1
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* @date 29-April-2016
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* @version V1.3.1
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* @date 21-April-2017
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* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
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*
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* This file provides two functions and one global variable to be called from
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/hal_tick.h

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#define TIM_MST TIM2
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#define TIM_MST_IRQ TIM2_IRQn
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#define TIM_MST_RCC __TIM2_CLK_ENABLE()
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#define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE()
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49-
#define TIM_MST_RESET_ON __TIM2_FORCE_RESET()
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#define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET()
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#define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET()
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#define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET()
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#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
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targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l432xx.h

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targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l4xx.h

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******************************************************************************
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* @file stm32l4xx.h
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* @author MCD Application Team
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* @version V1.1.1
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* @date 29-April-2016
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* @version V1.3.1
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* @date 21-April-2017
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* @brief CMSIS STM32L4xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*/
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#if !defined (STM32L431xx) && !defined (STM32L432xx) && !defined (STM32L433xx) && !defined (STM32L442xx) && !defined (STM32L443xx) && \
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!defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx)
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!defined (STM32L451xx) && !defined (STM32L452xx) && !defined (STM32L462xx) && \
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!defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx) && \
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!defined (STM32L496xx) && !defined (STM32L4A6xx)
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/* #define STM32L431xx */ /*!< STM32L431xx Devices */
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#define STM32L432xx /*!< STM32L432xx Devices */
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/* #define STM32L433xx */ /*!< STM32L433xx Devices */
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/* #define STM32L442xx */ /*!< STM32L442xx Devices */
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/* #define STM32L443xx */ /*!< STM32L443xx Devices */
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/* #define STM32L451xx */ /*!< STM32L451xx Devices */
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/* #define STM32L452xx */ /*!< STM32L452xx Devices */
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/* #define STM32L462xx */ /*!< STM32L462xx Devices */
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/* #define STM32L471xx */ /*!< STM32L471xx Devices */
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/* #define STM32L475xx */ /*!< STM32L475xx Devices */
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/* #define STM32L476xx */ /*!< STM32L476xx Devices */
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/* #define STM32L485xx */ /*!< STM32L485xx Devices */
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/* #define STM32L486xx */ /*!< STM32L486xx Devices */
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/* #define STM32L496xx */ /*!< STM32L496xx Devices */
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/* #define STM32L4A6xx */ /*!< STM32L4A6xx Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number V1.1.1
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* @brief CMSIS Device version number V1.3.1
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*/
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#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
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#define __STM32L4_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
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#define __STM32L4_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
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#define __STM32L4_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
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#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
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#include "stm32l496xx.h"
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#elif defined(STM32L4A6xx)
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#include "stm32l4a6xx.h"
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#elif defined(STM32L4R5xx)
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#include "stm32l4r5xx.h"
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#elif defined(STM32L4R9xx)
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#include "stm32l4r9xx.h"
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#elif defined(STM32L4S5xx)
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#include "stm32l4s5xx.h"
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#elif defined(STM32L4S9xx)
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#include "stm32l4s9xx.h"
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#else
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#error "Please select first the target STM32L4xx device used in your application (in stm32l4xx.h file)"
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#endif

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/system_stm32l4xx.h

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******************************************************************************
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* @file system_stm32l4xx.h
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* @author MCD Application Team
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* @version V1.1.1
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* @date 29-April-2016
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* @version V1.3.1
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* @date 21-April-2017
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* @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices.
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c

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******************************************************************************
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* @file system_stm32l4xx.c
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* @author MCD Application Team
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* @version V1.1.1
6-
* @date 29-April-2016
5+
* @version V1.3.1
6+
* @date 21-April-2017
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* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
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*
99
* This file provides two functions and one global variable to be called from
@@ -43,7 +43,7 @@
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******************************************************************************
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* @attention
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*
46-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
46+
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
4747
*
4848
* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c

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******************************************************************************
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* @file system_stm32l4xx.c
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* @author MCD Application Team
5-
* @version V1.1.1
6-
* @date 29-April-2016
5+
* @version V1.3.1
6+
* @date 21-April-2017
77
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
88
*
99
* This file provides two functions and one global variable to be called from
@@ -43,7 +43,7 @@
4343
******************************************************************************
4444
* @attention
4545
*
46-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
46+
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
4747
*
4848
* Redistribution and use in source and binary forms, with or without modification,
4949
* are permitted provided that the following conditions are met:

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/hal_tick.h

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#define TIM_MST TIM5
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#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
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49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
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#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
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#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
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#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
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#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
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