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Merge pull request #2875 from AlessandroA/efm32gg
EFM32GG: Add support for uVisor
2 parents ffe05f7 + f818aa1 commit 348a155

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5 files changed

+139
-48
lines changed

5 files changed

+139
-48
lines changed

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/device/TOOLCHAIN_GCC_ARM/efm32gg.ld

Lines changed: 119 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,9 @@
99
/* Version 4.2.0 */
1010
/* */
1111

12+
STACK_SIZE = 0x400;
13+
HEAP_SIZE = 0xC00;
14+
1215
MEMORY
1316
{
1417
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 1048576
@@ -53,6 +56,11 @@ __vector_size = 0xDC;
5356
*/
5457
ENTRY(Reset_Handler)
5558

59+
/* Note: The uVisor expects the text section at a fixed location, as specified
60+
by the porting process configuration parameter: FLASH_OFFSET. */
61+
__UVISOR_TEXT_OFFSET = 0x100;
62+
__UVISOR_TEXT_START = ORIGIN(FLASH) + __UVISOR_TEXT_OFFSET;
63+
5664
SECTIONS
5765
{
5866
.text :
@@ -62,6 +70,13 @@ SECTIONS
6270
__Vectors_Size = __Vectors_End - __Vectors;
6371
__end__ = .;
6472

73+
/* uVisor code and data */
74+
. = __UVISOR_TEXT_OFFSET;
75+
. = ALIGN(4);
76+
__uvisor_main_start = .;
77+
*(.uvisor.main)
78+
__uvisor_main_end = .;
79+
6580
*(.text*)
6681

6782
KEEP(*(.init))
@@ -132,10 +147,51 @@ SECTIONS
132147
} > FLASH
133148
*/
134149

135-
__etext = .;
150+
/* Ensure that the uVisor BSS section is put first in SRAM. */
151+
/* Note: The uVisor expects this section at a fixed location, as specified
152+
by the porting process configuration parameter: SRAM_OFFSET. */
153+
__UVISOR_SRAM_OFFSET = 0x0;
154+
__UVISOR_BSS_START = ORIGIN(RAM) + __UVISOR_SRAM_OFFSET;
155+
.uvisor.bss __UVISOR_BSS_START (NOLOAD):
156+
{
157+
. = ALIGN(32);
158+
__uvisor_bss_start = .;
159+
160+
/* uVisor main BSS section */
161+
. = ALIGN(32);
162+
__uvisor_bss_main_start = .;
163+
KEEP(*(.keep.uvisor.bss.main))
164+
. = ALIGN(32);
165+
__uvisor_bss_main_end = .;
136166

137-
.data : AT (__etext)
167+
/* Secure boxes BSS section */
168+
. = ALIGN(32);
169+
__uvisor_bss_boxes_start = .;
170+
KEEP(*(.keep.uvisor.bss.boxes))
171+
. = ALIGN(32);
172+
__uvisor_bss_boxes_end = .;
173+
174+
. = ALIGN(32);
175+
__uvisor_bss_end = .;
176+
} > RAM
177+
178+
/* Heap space for the page allocator */
179+
.page_heap (NOLOAD) :
138180
{
181+
. = ALIGN(32);
182+
__uvisor_page_start = .;
183+
KEEP(*(.keep.uvisor.page_heap))
184+
185+
. = ALIGN( (1 << LOG2CEIL(LENGTH(RAM))) / 8);
186+
187+
__uvisor_page_end = .;
188+
} > RAM
189+
190+
.data :
191+
{
192+
PROVIDE(__etext = LOADADDR(.data)); /* Define a global symbol at end of code, */
193+
PROVIDE(__DATA_ROM = LOADADDR(.data)); /* Symbol is used by startup for data initialization. */
194+
139195
__data_start__ = .;
140196
*("dma")
141197
PROVIDE( __start_vector_table__ = .);
@@ -171,6 +227,51 @@ SECTIONS
171227
/* All data end */
172228
__data_end__ = .;
173229

230+
} > RAM AT > FLASH
231+
232+
/* uVisor configuration section
233+
* This section must be located after all other flash regions. */
234+
.uvisor.secure :
235+
{
236+
. = ALIGN(32);
237+
__uvisor_secure_start = .;
238+
239+
/* uVisor secure boxes configuration tables */
240+
. = ALIGN(32);
241+
__uvisor_cfgtbl_start = .;
242+
KEEP(*(.keep.uvisor.cfgtbl))
243+
. = ALIGN(32);
244+
__uvisor_cfgtbl_end = .;
245+
246+
/* Pointers to the uVisor secure boxes configuration tables */
247+
/* Note: Do not add any further alignment here, as uVisor will need to
248+
have access to the exact list of pointers. */
249+
__uvisor_cfgtbl_ptr_start = .;
250+
KEEP(*(.keep.uvisor.cfgtbl_ptr_first))
251+
KEEP(*(.keep.uvisor.cfgtbl_ptr))
252+
__uvisor_cfgtbl_ptr_end = .;
253+
254+
/* Pointers to all boxes register gateways. These are grouped here to
255+
allow discoverability and firmware verification. */
256+
__uvisor_register_gateway_ptr_start = .;
257+
KEEP(*(.keep.uvisor.register_gateway_ptr))
258+
__uvisor_register_gateway_ptr_end = .;
259+
260+
. = ALIGN(32);
261+
__uvisor_secure_end = .;
262+
} > FLASH
263+
264+
/* Uninitialized data section
265+
* This region is not initialized by the C/C++ library and can be used to
266+
* store state across soft reboots. */
267+
.uninitialized (NOLOAD):
268+
{
269+
. = ALIGN(32);
270+
__uninitialized_start = .;
271+
*(.uninitialized)
272+
KEEP(*(.keep.uninitialized))
273+
. = ALIGN(32);
274+
__uninitialized_end = .;
174275
} > RAM
175276

176277
.bss :
@@ -183,33 +284,29 @@ SECTIONS
183284
__bss_end__ = .;
184285
} > RAM
185286

186-
.heap (COPY):
287+
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
288+
__stack = __StackTop;
289+
__StackLimit = __StackTop - STACK_SIZE;
290+
291+
.heap (NOLOAD):
187292
{
293+
__uvisor_heap_start = .;
188294
__HeapBase = .;
189295
__end__ = .;
190296
end = __end__;
191297
_end = __end__;
192-
KEEP(*(.heap*))
193-
__HeapLimit = .;
298+
. += HEAP_SIZE;
194299
} > RAM
195300

196-
/* .stack_dummy section doesn't contains any symbols. It is only
197-
* used for linker to calculate size of stack sections, and assign
198-
* values to stack symbols later */
199-
.stack_dummy (COPY):
200-
{
201-
KEEP(*(.stack*))
202-
} > RAM
203-
204-
/* Set stack top to end of RAM, and stack limit move down by
205-
* size of stack_dummy section */
206-
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
207-
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
208-
PROVIDE(__stack = __StackTop);
301+
__HeapLimit = __StackLimit;
302+
__uvisor_heap_end = __StackLimit;
209303

210-
/* Check if data + heap + stack exceeds RAM limit */
211-
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
304+
/* Provide physical memory boundaries for uVisor. */
305+
__uvisor_flash_start = ORIGIN(FLASH);
306+
__uvisor_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
307+
__uvisor_sram_start = ORIGIN(RAM);
308+
__uvisor_sram_end = ORIGIN(RAM) + LENGTH(RAM);
212309

213-
/* Check if FLASH usage exceeds FLASH size */
214-
ASSERT( LENGTH(FLASH) >= (__etext + SIZEOF(.data)), "FLASH memory overflowed !")
310+
/* Check if FLASH usage exceeds FLASH size. */
311+
ASSERT(LENGTH(FLASH) >= __uvisor_secure_end, "FLASH memory overflowed!")
215312
}

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/device/TOOLCHAIN_GCC_ARM/startup_efm32gg.S

Lines changed: 5 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -49,23 +49,6 @@ __StackLimit:
4949
__StackTop:
5050
.size __StackTop, . - __StackTop
5151

52-
.section .heap
53-
.align 3
54-
#ifdef __HEAP_SIZE
55-
.equ Heap_Size, __HEAP_SIZE
56-
#else
57-
.equ Heap_Size, 0x00000C00
58-
#endif
59-
.globl __HeapBase
60-
.globl __HeapLimit
61-
__HeapBase:
62-
.if Heap_Size
63-
.space Heap_Size
64-
.endif
65-
.size __HeapBase, . - __HeapBase
66-
__HeapLimit:
67-
.size __HeapLimit, . - __HeapLimit
68-
6952
.section .vectors
7053
.align 2
7154
.globl __Vectors
@@ -144,6 +127,11 @@ Reset_Handler:
144127
blx r0
145128
#endif
146129

130+
#if defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)
131+
ldr r0, =uvisor_init
132+
blx r0
133+
#endif /* defined(FEATURE_UVISOR) && defined(UVISOR_SUPPORTED) */
134+
147135
/* Firstly it copies data from read only memory to RAM. There are two schemes
148136
* to copy. One can copy more than one sections. Another can only copy
149137
* one section. The former scheme needs more instructions and read-only

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/device/cmsis_nvic.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ extern uint32_t __start_vector_table__; // Dynamic vector positioning in GCC
1212
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
1313
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
1414

15-
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
15+
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
1616
uint32_t *vectors = (uint32_t*)SCB->VTOR;
1717
uint32_t i;
1818

@@ -41,7 +41,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
4141
vectors[IRQn + 16] = vector;
4242
}
4343

44-
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
44+
uint32_t __NVIC_GetVector(IRQn_Type IRQn) {
4545
uint32_t *vectors = (uint32_t*)SCB->VTOR;
4646
return vectors[IRQn + 16];
4747
}

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/device/cmsis_nvic.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@
1616
extern "C" {
1717
#endif
1818

19-
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
20-
uint32_t NVIC_GetVector(IRQn_Type IRQn);
19+
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
20+
uint32_t __NVIC_GetVector(IRQn_Type IRQn);
2121

2222
#ifdef __cplusplus
2323
}

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_system.c

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232

3333
#include "em_system.h"
3434
#include "em_assert.h"
35+
#include "core_cmSecureAccess.h"
3536

3637
/***************************************************************************//**
3738
* @addtogroup EM_Library
@@ -61,19 +62,24 @@ void SYSTEM_ChipRevisionGet(SYSTEM_ChipRevision_TypeDef *rev)
6162

6263
EFM_ASSERT(rev);
6364

65+
uint32_t pid0 = SECURE_READ(&(ROMTABLE->PID0));
66+
uint32_t pid1 = SECURE_READ(&(ROMTABLE->PID1));
67+
uint32_t pid2 = SECURE_READ(&(ROMTABLE->PID2));
68+
uint32_t pid3 = SECURE_READ(&(ROMTABLE->PID3));
69+
6470
/* CHIP FAMILY bit [5:2] */
65-
tmp = (((ROMTABLE->PID1 & _ROMTABLE_PID1_FAMILYMSB_MASK) >> _ROMTABLE_PID1_FAMILYMSB_SHIFT) << 2);
71+
tmp = (((pid1 & _ROMTABLE_PID1_FAMILYMSB_MASK) >> _ROMTABLE_PID1_FAMILYMSB_SHIFT) << 2);
6672
/* CHIP FAMILY bit [1:0] */
67-
tmp |= ((ROMTABLE->PID0 & _ROMTABLE_PID0_FAMILYLSB_MASK) >> _ROMTABLE_PID0_FAMILYLSB_SHIFT);
73+
tmp |= ((pid0 & _ROMTABLE_PID0_FAMILYLSB_MASK) >> _ROMTABLE_PID0_FAMILYLSB_SHIFT);
6874
rev->family = tmp;
6975

7076
/* CHIP MAJOR bit [3:0] */
71-
rev->major = (ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) >> _ROMTABLE_PID0_REVMAJOR_SHIFT;
77+
rev->major = (pid0 & _ROMTABLE_PID0_REVMAJOR_MASK) >> _ROMTABLE_PID0_REVMAJOR_SHIFT;
7278

7379
/* CHIP MINOR bit [7:4] */
74-
tmp = (((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4);
80+
tmp = (((pid2 & _ROMTABLE_PID2_REVMINORMSB_MASK) >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4);
7581
/* CHIP MINOR bit [3:0] */
76-
tmp |= ((ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) >> _ROMTABLE_PID3_REVMINORLSB_SHIFT);
82+
tmp |= ((pid3 & _ROMTABLE_PID3_REVMINORLSB_MASK) >> _ROMTABLE_PID3_REVMINORLSB_SHIFT);
7783
rev->minor = tmp;
7884
}
7985

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