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Merge pull request #10758 from toyowata/stm32f407xe
Move Seeed ARCH_MAX to TARGET_STM32F407xE MCU
2 parents dbe274c + f1628f0 commit 356c4fb

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targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/PeripheralNames.h renamed to targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TARGET_ARCH_MAX/PeripheralNames.h

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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* Copyright (c) 2014-2019, STMicroelectronics
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/PeripheralPins.c renamed to targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TARGET_ARCH_MAX/PeripheralPins.c

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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* Copyright (c) 2014-2019, STMicroelectronics
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/PinNames.h renamed to targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TARGET_ARCH_MAX/PinNames.h

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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* Copyright (c) 2014-2019, STMicroelectronics
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/system_clock.c renamed to targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TARGET_ARCH_MAX/system_clock.c

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2017 ARM Limited
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* Copyright (c) 2006-2019 ARM Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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**/
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#include "stm32f4xx.h"
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#include "nvic_addr.h"
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/*!< Uncomment the following line if you need to relocate your vector Table in
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Internal SRAM. */
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
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#endif
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}
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#! armcc -E
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; *****************************************
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; *** Scatter-Loading Description File ***
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; *****************************************
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x00080000
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x00020000
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#endif
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#define MBED_RAM2_START 0x10000000
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#define MBED_RAM2_SIZE 0x00010000
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#define VECTOR_SIZE 0x188
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#define MBED_CRASH_REPORT_RAM_SIZE 0x100
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#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
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}
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RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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RW_IRAM2 MBED_RAM2_START MBED_RAM2_SIZE { ; CCM
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.ANY (CCMRAM)
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}

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