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Merge pull request #12996 from pilotak/master
STM32F412 bypass PLL configuration when already done by bootloader
2 parents 65cbf97 + 9d7e55b commit 3ef2b16

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targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_WIO_EMW3166/system_clock.c

Lines changed: 0 additions & 220 deletions
This file was deleted.
Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -102,25 +102,32 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
102102
regarding system frequency refer to product datasheet. */
103103
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
104104

105-
/* Enable HSE oscillator and activate PLL with HSE as source */
106-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
107-
if (bypass == 0) {
108-
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
109-
} else {
110-
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
111-
}
105+
/* Get the Clocks configuration according to the internal RCC registers */
106+
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
112107

113-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
114-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
108+
/* PLL could be already configured by bootlader */
109+
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON)
110+
{
111+
/* Enable HSE oscillator and activate PLL with HSE as source */
112+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
113+
if (bypass == 0) {
114+
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
115+
} else {
116+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
117+
}
115118

116-
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
117-
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
118-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
119-
RCC_OscInitStruct.PLL.PLLQ = 7;
120-
RCC_OscInitStruct.PLL.PLLR = 2;
119+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
120+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
121121

122-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
123-
return 0; // FAIL
122+
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
123+
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
124+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
125+
RCC_OscInitStruct.PLL.PLLQ = 7;
126+
RCC_OscInitStruct.PLL.PLLR = 2;
127+
128+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
129+
return 0; // FAIL
130+
}
124131
}
125132

126133
/* Select PLLSAI output as USB clock source */

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