|
| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2006-2019 ARM Limited |
| 3 | + * SPDX-License-Identifier: Apache-2.0 |
| 4 | + * |
| 5 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 6 | + * you may not use this file except in compliance with the License. |
| 7 | + * You may obtain a copy of the License at |
| 8 | + * |
| 9 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | + * |
| 11 | + * Unless required by applicable law or agreed to in writing, software |
| 12 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 13 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | + * See the License for the specific language governing permissions and |
| 15 | + * limitations under the License. |
| 16 | + */ |
| 17 | +#ifndef MBED_PINNAMES_H |
| 18 | +#define MBED_PINNAMES_H |
| 19 | + |
| 20 | +#include "cmsis.h" |
| 21 | +#include "nrf_gpio.h" |
| 22 | + |
| 23 | +#ifdef __cplusplus |
| 24 | +extern "C" { |
| 25 | +#endif |
| 26 | + |
| 27 | +typedef enum { |
| 28 | + PIN_INPUT, |
| 29 | + PIN_OUTPUT |
| 30 | +} PinDirection; |
| 31 | + |
| 32 | +#define PORT_SHIFT 3 |
| 33 | + |
| 34 | +///> define macro producing for example Px_y = NRF_GPIO_PIN_MAP(x, y) |
| 35 | +#define PinDef(port_num, pin_num) P##port_num##_##pin_num = NRF_GPIO_PIN_MAP(port_num, pin_num) |
| 36 | + |
| 37 | + |
| 38 | +typedef enum { |
| 39 | + PinDef(0, 0), // P0_0 = 0... |
| 40 | + PinDef(0, 1), |
| 41 | + PinDef(0, 2), |
| 42 | + PinDef(0, 3), |
| 43 | + PinDef(0, 4), |
| 44 | + PinDef(0, 5), |
| 45 | + PinDef(0, 6), |
| 46 | + PinDef(0, 7), |
| 47 | + PinDef(0, 8), |
| 48 | + PinDef(0, 9), |
| 49 | + PinDef(0, 10), |
| 50 | + PinDef(0, 11), |
| 51 | + PinDef(0, 12), |
| 52 | + PinDef(0, 13), |
| 53 | + PinDef(0, 14), |
| 54 | + PinDef(0, 15), |
| 55 | + PinDef(0, 16), |
| 56 | + PinDef(0, 17), |
| 57 | + PinDef(0, 18), |
| 58 | + PinDef(0, 19), |
| 59 | + PinDef(0, 20), |
| 60 | + PinDef(0, 21), |
| 61 | + PinDef(0, 22), |
| 62 | + PinDef(0, 23), |
| 63 | + PinDef(0, 24), |
| 64 | + PinDef(0, 25), |
| 65 | + PinDef(0, 26), |
| 66 | + PinDef(0, 27), |
| 67 | + PinDef(0, 28), |
| 68 | + PinDef(0, 29), |
| 69 | + PinDef(0, 30), |
| 70 | + PinDef(0, 31), |
| 71 | + |
| 72 | + PinDef(1, 0), //P1_1 = 32... |
| 73 | + PinDef(1, 1), |
| 74 | + PinDef(1, 2), |
| 75 | + PinDef(1, 3), |
| 76 | + PinDef(1, 4), |
| 77 | + PinDef(1, 5), |
| 78 | + PinDef(1, 6), |
| 79 | + PinDef(1, 7), |
| 80 | + PinDef(1, 8), |
| 81 | + PinDef(1, 9), |
| 82 | + PinDef(1, 10), |
| 83 | + PinDef(1, 11), |
| 84 | + PinDef(1, 12), |
| 85 | + PinDef(1, 13), |
| 86 | + PinDef(1, 14), |
| 87 | + PinDef(1, 15), |
| 88 | + |
| 89 | + // Port0 |
| 90 | + p0 = P0_0, |
| 91 | + p1 = P0_1, |
| 92 | + p2 = P0_2, |
| 93 | + p3 = P0_3, |
| 94 | + p4 = P0_4, |
| 95 | + p5 = P0_5, |
| 96 | + p6 = P0_6, |
| 97 | + p7 = P0_7, |
| 98 | + p8 = P0_8, |
| 99 | + p9 = P0_9, |
| 100 | + p10 = P0_10, |
| 101 | + p11 = P0_11, |
| 102 | + p12 = P0_12, |
| 103 | + p13 = P0_13, |
| 104 | + p14 = P0_14, |
| 105 | + p15 = P0_15, |
| 106 | + p16 = P0_16, |
| 107 | + p17 = P0_17, |
| 108 | + p18 = P0_18, |
| 109 | + p19 = P0_19, |
| 110 | + p20 = P0_20, |
| 111 | + p21 = P0_21, |
| 112 | + p22 = P0_22, |
| 113 | + p23 = P0_23, |
| 114 | + p24 = P0_24, |
| 115 | + p25 = P0_25, |
| 116 | + p26 = P0_26, |
| 117 | + p27 = P0_27, |
| 118 | + p28 = P0_28, |
| 119 | + p29 = P0_29, |
| 120 | + p30 = P0_30, |
| 121 | + p31 = P0_31, |
| 122 | + |
| 123 | + // Port1 |
| 124 | + p32 = P1_0, |
| 125 | + p33 = P1_1, |
| 126 | + p34 = P1_2, |
| 127 | + p35 = P1_3, |
| 128 | + p36 = P1_4, |
| 129 | + p37 = P1_5, |
| 130 | + p38 = P1_6, |
| 131 | + p39 = P1_7, |
| 132 | + p40 = P1_8, |
| 133 | + p41 = P1_9, |
| 134 | + p42 = P1_10, |
| 135 | + p43 = P1_11, |
| 136 | + p44 = P1_12, |
| 137 | + p45 = P1_13, |
| 138 | + p46 = P1_14, |
| 139 | + p47 = P1_15, |
| 140 | + |
| 141 | + SPI_PSELMOSI0 = P1_13, |
| 142 | + SPI_PSELMISO0 = P1_14, |
| 143 | + SPI_PSELSS0 = P1_12, |
| 144 | + SPI_PSELSCK0 = P1_15, |
| 145 | + |
| 146 | + SPI_PSELMOSI1 = P1_2, |
| 147 | + SPI_PSELMISO1 = P1_3, |
| 148 | + SPI_PSELSS1 = P1_1, |
| 149 | + SPI_PSELSCK1 = P1_4, |
| 150 | + |
| 151 | + SPIS_PSELMOSI = P1_2, |
| 152 | + SPIS_PSELMISO = P1_3, |
| 153 | + SPIS_PSELSS = P1_1, |
| 154 | + SPIS_PSELSCK = P1_4, |
| 155 | + |
| 156 | + I2C_SDA0 = p26, |
| 157 | + I2C_SCL0 = p27, |
| 158 | + |
| 159 | + D0 = P1_1, |
| 160 | + D1 = P1_2, |
| 161 | + D2 = P1_3, |
| 162 | + D3 = P1_4, |
| 163 | + D4 = P1_5, |
| 164 | + D5 = P1_6, |
| 165 | + D6 = P1_7, |
| 166 | + D7 = P1_8, |
| 167 | + |
| 168 | + D8 = P1_10, |
| 169 | + D9 = P1_11, |
| 170 | + D10 = P1_12, |
| 171 | + D11 = P1_13, |
| 172 | + D12 = P1_14, |
| 173 | + D13 = P1_15, |
| 174 | + |
| 175 | + D14 = p26, |
| 176 | + D15 = p27, |
| 177 | + |
| 178 | + A0 = p3, |
| 179 | + A1 = p4, |
| 180 | + A2 = p28, |
| 181 | + A3 = p29, |
| 182 | + A4 = p30, |
| 183 | + A5 = p31, |
| 184 | + |
| 185 | + /**** QSPI pins ****/ |
| 186 | + QSPI1_IO0 = P0_20, |
| 187 | + QSPI1_IO1 = P0_21, |
| 188 | + QSPI1_IO2 = P0_22, |
| 189 | + QSPI1_IO3 = P0_23, |
| 190 | + QSPI1_SCK = P0_19, |
| 191 | + QSPI1_CSN = P0_17, |
| 192 | + |
| 193 | + /* Agora-specific pins */ |
| 194 | + |
| 195 | + // Battery |
| 196 | + PIN_NAME_BATTERY = P0_2, |
| 197 | + PIN_NAME_BATTERY_MONITOR_ENABLE = P1_11, |
| 198 | + |
| 199 | + // Board ID |
| 200 | + PIN_NAME_BOARD_ID = P0_3, |
| 201 | + PIN_NAME_BOARD_ID_DISABLE = P1_6, |
| 202 | + |
| 203 | + // NFC |
| 204 | + PIN_NAME_NFC1 = P0_9, |
| 205 | + PIN_NAME_NFC2 = P0_10, |
| 206 | + |
| 207 | + // DEBUG UART |
| 208 | + PIN_NAME_DEBUG_RX = P0_11, |
| 209 | + PIN_NAME_DEBUG_TX = P0_13, |
| 210 | + |
| 211 | + // LoRa |
| 212 | + PIN_NAME_LORA_SSN = P1_12, |
| 213 | + PIN_NAME_LORA_MOSI = P1_13, |
| 214 | + PIN_NAME_LORA_MISO = P1_14, |
| 215 | + PIN_NAME_LORA_SCLK = P1_15, |
| 216 | + PIN_NAME_LORA_RESETN = P1_10, |
| 217 | + PIN_NAME_LORA_DIO0 = P1_7, |
| 218 | + PIN_NAME_LORA_DIO1 = P1_9, |
| 219 | + PIN_NAME_LORA_DIO2 = P0_12, |
| 220 | + PIN_NAME_LORA_DIO3 = P0_16, |
| 221 | + PIN_NAME_LORA_DIO4 = P0_14, |
| 222 | + |
| 223 | + // Cell |
| 224 | + PIN_NAME_CELL_POWER_ENABLE = P0_28, |
| 225 | + PIN_NAME_CELL_ON_OFF = P0_30, |
| 226 | + PIN_NAME_CELL_HW_SHUTDOWN = P0_24, |
| 227 | + PIN_NAME_CELL_RX = P1_1, |
| 228 | + PIN_NAME_CELL_TX = P1_2, |
| 229 | + PIN_NAME_CELL_DTR = P0_7, |
| 230 | + PIN_NAME_CELL_DSR = P1_3, |
| 231 | + PIN_NAME_CELL_DCD = P0_15, |
| 232 | + PIN_NAME_CELL_RTS = P1_4, |
| 233 | + PIN_NAME_CELL_CTS = P1_5, |
| 234 | + |
| 235 | + // Sensors (I2C) |
| 236 | + PIN_NAME_SENSOR_POWER_ENABLE = P0_31, |
| 237 | + PIN_NAME_SDA = P0_26, |
| 238 | + PIN_NAME_SCL = P0_27, |
| 239 | + |
| 240 | + // Sensor interrupts |
| 241 | + PIN_NAME_INT_ACCEL = P1_8, |
| 242 | + PIN_NAME_INT_LIGHT_TOF = P0_4, |
| 243 | + |
| 244 | + // Microphone (I2S) |
| 245 | + PIN_NAME_I2S_SD = P0_25, |
| 246 | + PIN_NAME_I2S_SCK = P0_6, |
| 247 | + PIN_NAME_I2S_WS = P0_8, |
| 248 | + |
| 249 | + // QSPI |
| 250 | + PIN_NAME_QSPI_IO0 = P0_20, |
| 251 | + PIN_NAME_QSPI_IO1 = P0_21, |
| 252 | + PIN_NAME_QSPI_IO2 = P0_22, |
| 253 | + PIN_NAME_QSPI_IO3 = P0_23, |
| 254 | + PIN_NAME_QSPI_CSN = P0_17, |
| 255 | + PIN_NAME_QSPI_CLK = P0_19, |
| 256 | + |
| 257 | + // Miscellaneous I/O |
| 258 | + PIN_NAME_PUSH_BUTTON = P0_29, |
| 259 | + PIN_NAME_LED_RED = P0_5, |
| 260 | + PIN_NAME_BT840_RESETN = P0_18, |
| 261 | + PIN_NAME_BT840_SWO = P1_0, |
| 262 | + |
| 263 | + /* mbed pins */ |
| 264 | + |
| 265 | + // used by mbed for default serial out on printf statements |
| 266 | + RX_PIN_NUMBER = PIN_NAME_DEBUG_RX, |
| 267 | + TX_PIN_NUMBER = PIN_NAME_DEBUG_TX, |
| 268 | + USBRX = PIN_NAME_DEBUG_RX, |
| 269 | + USBTX = PIN_NAME_DEBUG_TX, |
| 270 | + STDIO_UART_RX = PIN_NAME_DEBUG_RX, |
| 271 | + STDIO_UART_TX = PIN_NAME_DEBUG_TX, |
| 272 | + |
| 273 | + MDMTXD = PIN_NAME_CELL_TX, |
| 274 | + MDMRXD = PIN_NAME_CELL_RX, |
| 275 | + MDMCTS = PIN_NAME_CELL_CTS, |
| 276 | + MDMDCD = PIN_NAME_CELL_DCD, |
| 277 | + MDMDSR = PIN_NAME_CELL_DSR, |
| 278 | + MDMDTR = PIN_NAME_CELL_DTR, |
| 279 | + MDMRTS = PIN_NAME_CELL_RTS, |
| 280 | + |
| 281 | + /**** QSPI FLASH pins ****/ |
| 282 | + QSPI_FLASH1_IO0 = PIN_NAME_QSPI_IO0, |
| 283 | + QSPI_FLASH1_IO1 = PIN_NAME_QSPI_IO1, |
| 284 | + QSPI_FLASH1_IO2 = PIN_NAME_QSPI_IO2, |
| 285 | + QSPI_FLASH1_IO3 = PIN_NAME_QSPI_IO3, |
| 286 | + QSPI_FLASH1_SCK = PIN_NAME_QSPI_CLK, |
| 287 | + QSPI_FLASH1_CSN = PIN_NAME_QSPI_CSN, |
| 288 | + |
| 289 | + SPI_MOSI = PIN_NAME_QSPI_IO0, |
| 290 | + SPI_MISO = PIN_NAME_QSPI_IO1, |
| 291 | + SPI_SCK = PIN_NAME_QSPI_CLK, |
| 292 | + SPI_CS = PIN_NAME_QSPI_CSN, |
| 293 | + |
| 294 | + // LED |
| 295 | + LED1 = PIN_NAME_LED_RED, |
| 296 | + LED2 = LED1, |
| 297 | + |
| 298 | + // Not connected |
| 299 | + NC = (int)0xFFFFFFFF, |
| 300 | + |
| 301 | + // Compiler complains unless these are specified |
| 302 | + STDIO_UART_CTS = NC, |
| 303 | + STDIO_UART_RTS = NC, |
| 304 | + MDMRI = NC |
| 305 | +} PinName; |
| 306 | + |
| 307 | +typedef enum { |
| 308 | + PullNone = 0, |
| 309 | + PullDown = 1, |
| 310 | + PullUp = 3, |
| 311 | + PullDefault = PullUp |
| 312 | +} PinMode; |
| 313 | + |
| 314 | +#define ACTIVE_HIGH_POLARITY 1 |
| 315 | +#define ACTIVE_LOW_POLARITY 0 |
| 316 | + |
| 317 | +#define MDM_PIN_POLARITY ACTIVE_HIGH_POLARITY |
| 318 | + |
| 319 | +#ifdef __cplusplus |
| 320 | +} |
| 321 | +#endif |
| 322 | + |
| 323 | +#endif |
0 commit comments