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Merge pull request #422 from Experiment-626/master
[TARGET_LPC11UXX] PeripheralNames.h and PinMap definitions separation for LPC11UXX platforms
2 parents 885659a + 4a870d3 commit 5b145e4

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libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
66
.ANY (+RO)
77
}
88
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
9-
; 8KB - 0xC0 = 0x1F40
10-
RW_IRAM1 0x100000C0 0x1F40 {
9+
; 6KB - 0xC0 = 0x1740
10+
RW_IRAM1 0x100000C0 0x1740 {
1111
.ANY (+RW +ZI)
1212
}
1313
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM

libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
66
.ANY (+RO)
77
}
88
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
9-
; 8KB - 0xC0 = 0x1F40
10-
RW_IRAM1 0x100000C0 0x1F40 {
9+
; 6KB - 0xC0 = 0x1740
10+
RW_IRAM1 0x100000C0 0x1740 {
1111
.ANY (+RW +ZI)
1212
}
1313
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM

libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
MEMORY
55
{
66
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 32K
7-
RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
7+
RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1740
88
USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
99
}
1010

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,43 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#ifndef MBED_PERIPHERALPINS_H
18+
#define MBED_PERIPHERALPINS_H
19+
20+
#include "pinmap.h"
21+
#include "PeripheralNames.h"
22+
23+
/************ADC***************/
24+
extern const PinMap PinMap_ADC[];
25+
26+
/************I2C***************/
27+
extern const PinMap PinMap_I2C_SDA[];
28+
extern const PinMap PinMap_I2C_SCL[];
29+
30+
/************UART***************/
31+
extern const PinMap PinMap_UART_TX[];
32+
extern const PinMap PinMap_UART_RX[];
33+
34+
/************SPI***************/
35+
extern const PinMap PinMap_SPI_SCLK[];
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extern const PinMap PinMap_SPI_MOSI[];
37+
extern const PinMap PinMap_SPI_MISO[];
38+
extern const PinMap PinMap_SPI_SSEL[];
39+
40+
/************PWM***************/
41+
extern const PinMap PinMap_PWM[];
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#endif
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@@ -0,0 +1,117 @@
1+
2+
/* mbed Microcontroller Library
3+
* Copyright (c) 2006-2013 ARM Limited
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
18+
#include "PeripheralPins.h"
19+
20+
/************ADC***************/
21+
const PinMap PinMap_ADC[] = {
22+
{P0_11, ADC0_0, 0x02},
23+
{P0_12, ADC0_1, 0x02},
24+
{P0_13, ADC0_2, 0x02},
25+
{P0_14, ADC0_3, 0x02},
26+
{P0_15, ADC0_4, 0x02},
27+
{P0_16, ADC0_5, 0x01},
28+
{P0_22, ADC0_6, 0x01},
29+
{P0_23, ADC0_7, 0x01},
30+
{NC , NC , 0 }
31+
};
32+
33+
/************I2C***************/
34+
const PinMap PinMap_I2C_SDA[] = {
35+
{P0_5, I2C_0, 1},
36+
{NC , NC , 0}
37+
};
38+
39+
const PinMap PinMap_I2C_SCL[] = {
40+
{P0_4, I2C_0, 1},
41+
{NC , NC, 0}
42+
};
43+
44+
/************UART***************/
45+
const PinMap PinMap_UART_TX[] = {
46+
{P0_19, UART_0, 1},
47+
{P1_13, UART_0, 3},
48+
{P1_27, UART_0, 2},
49+
{ NC , NC , 0}
50+
};
51+
52+
const PinMap PinMap_UART_RX[] = {
53+
{P0_18, UART_0, 1},
54+
{P1_14, UART_0, 3},
55+
{P1_26, UART_0, 2},
56+
{NC , NC , 0}
57+
};
58+
59+
/************SPI***************/
60+
const PinMap PinMap_SPI_SCLK[] = {
61+
{P0_6 , SPI_0, 0x02},
62+
{P0_10, SPI_0, 0x02},
63+
{P1_29, SPI_0, 0x01},
64+
{P1_15, SPI_1, 0x03},
65+
{P1_20, SPI_1, 0x02},
66+
{NC , NC , 0}
67+
};
68+
69+
const PinMap PinMap_SPI_MOSI[] = {
70+
{P0_9 , SPI_0, 0x01},
71+
{P0_21, SPI_1, 0x02},
72+
{P1_22, SPI_1, 0x02},
73+
{NC , NC , 0}
74+
};
75+
76+
const PinMap PinMap_SPI_MISO[] = {
77+
{P0_8 , SPI_0, 0x01},
78+
{P0_22, SPI_1, 0x03},
79+
{P1_21, SPI_1, 0x02},
80+
{NC , NC , 0}
81+
};
82+
83+
const PinMap PinMap_SPI_SSEL[] = {
84+
{P0_2 , SPI_0, 0x01},
85+
{P1_19, SPI_1, 0x02},
86+
{P1_23, SPI_1, 0x02},
87+
{NC , NC , 0}
88+
};
89+
90+
/************PWM***************/
91+
/* To have a PWM where we can change both the period and the duty cycle,
92+
* we need an entire timer. With the following conventions:
93+
* * MR3 is used for the PWM period
94+
* * MR0, MR1, MR2 are used for the duty cycle
95+
*/
96+
const PinMap PinMap_PWM[] = {
97+
/* CT16B0 */
98+
{P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */
99+
{P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */
100+
{P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */
101+
102+
/* CT16B1 */
103+
{P0_21, PWM_4, 1}, /* MR0 */
104+
{P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */
105+
106+
/* CT32B0 */
107+
{P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */
108+
{P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */
109+
{P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */
110+
111+
/* CT32B1 */
112+
{P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */
113+
{P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */
114+
{P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */
115+
116+
{NC, NC, 0}
117+
};

libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_GHI_MBUINO/PeripheralNames.h

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -57,28 +57,32 @@ typedef enum {
5757
PWM_8,
5858
PWM_9,
5959
PWM_10,
60-
PWM_11
60+
PWM_11,
61+
PWM_12,
62+
PWM_13
6163
} PWMName;
6264

6365
#define STDIO_UART_TX USBTX
6466
#define STDIO_UART_RX USBRX
6567
#define STDIO_UART UART_0
6668

6769
// Default peripherals
68-
#define MBED_SPI0 p5, p6, p7, p8
69-
#define MBED_SPI1 p11, p12, p13, p14
70+
#define MBED_SPI0 P0_9, P0_8, P0_6, P0_2 // MOSI, MISO, CLK, SEL
71+
#define MBED_SPI1 P0_21, P0_22, P1_15, P01_19 // MOSI, MISO, CLK, SEL
7072

71-
#define MBED_UART0 p9, p10
73+
#define MBED_UART0 USBTX, USBRX
7274
#define MBED_UARTUSB USBTX, USBRX
7375

74-
#define MBED_I2C0 p28, p27
76+
#define MBED_I2C0 P0_5, P0_4
7577

76-
#define MBED_ANALOGIN0 p15
77-
#define MBED_ANALOGIN1 p16
78-
#define MBED_ANALOGIN2 p17
79-
#define MBED_ANALOGIN3 p18
80-
#define MBED_ANALOGIN4 p19
81-
#define MBED_ANALOGIN5 p20
78+
#define MBED_ANALOGIN0 P0_11
79+
#define MBED_ANALOGIN1 P0_12
80+
#define MBED_ANALOGIN2 P0_13
81+
#define MBED_ANALOGIN3 P0_14
82+
#define MBED_ANALOGIN4 P0_15
83+
#define MBED_ANALOGIN5 P0_16
84+
#define MBED_ANALOGIN6 P0_22
85+
#define MBED_ANALOGIN7 P0_23
8286

8387
#ifdef __cplusplus
8488
}
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,104 @@
1+
2+
/* mbed Microcontroller Library
3+
* Copyright (c) 2006-2013 ARM Limited
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
18+
#include "PeripheralPins.h"
19+
20+
/************ADC***************/
21+
const PinMap PinMap_ADC[] = {
22+
{P0_11, ADC0_0, 0x02},
23+
{P0_12, ADC0_1, 0x02},
24+
{P0_13, ADC0_2, 0x02},
25+
{P0_14, ADC0_3, 0x02},
26+
{P0_15, ADC0_4, 0x02},
27+
{P0_16, ADC0_5, 0x01},
28+
{P0_22, ADC0_6, 0x01},
29+
{P0_23, ADC0_7, 0x01},
30+
{NC , NC , 0 }
31+
};
32+
33+
/************UART***************/
34+
const PinMap PinMap_UART_TX[] = {
35+
{P0_19, UART_0, 1},
36+
// {P1_13, UART_0, 3},
37+
// {P1_27, UART_0, 2},
38+
{ NC , NC , 0}
39+
};
40+
41+
const PinMap PinMap_UART_RX[] = {
42+
{P0_18, UART_0, 1},
43+
// {P1_14, UART_0, 3},
44+
// {P1_26, UART_0, 2},
45+
{NC , NC , 0}
46+
};
47+
48+
/************SPI***************/
49+
const PinMap PinMap_SPI_SCLK[] = {
50+
{P0_6 , SPI_0, 0x02},
51+
{P0_10, SPI_0, 0x02},
52+
// {P1_29, SPI_0, 0x01},
53+
{P1_15, SPI_1, 0x03},
54+
// {P1_20, SPI_1, 0x02},
55+
{NC , NC , 0}
56+
};
57+
58+
const PinMap PinMap_SPI_MOSI[] = {
59+
{P0_9 , SPI_0, 0x01},
60+
{P0_21, SPI_1, 0x02},
61+
// {P1_22, SPI_1, 0x02},
62+
{NC , NC , 0}
63+
};
64+
65+
const PinMap PinMap_SPI_MISO[] = {
66+
{P0_8 , SPI_0, 0x01},
67+
{P0_22, SPI_1, 0x03},
68+
// {P1_21, SPI_1, 0x02},
69+
{NC , NC , 0}
70+
};
71+
72+
const PinMap PinMap_SPI_SSEL[] = {
73+
{P0_2 , SPI_0, 0x01},
74+
{P1_19, SPI_1, 0x02},
75+
// {P1_23, SPI_1, 0x02},
76+
{NC , NC , 0}
77+
};
78+
79+
/************PWM***************/
80+
const PinMap PinMap_PWM[] = {
81+
/* CT16B0 */
82+
{P0_8 , PWM_1, 2}, /* MR0 */
83+
{P0_9 , PWM_2, 2}, /* MR1 */
84+
{P0_10, PWM_3, 3}, /* MR2 */
85+
{P1_15, PWM_3, 2}, /* MR2 */ // Same channel as P0_10
86+
87+
/* CT16B1 */
88+
{P0_21, PWM_4, 1}, /* MR0 */
89+
{P0_22, PWM_5, 2}, /* MR1 */
90+
91+
/* CT32B0 */
92+
{P0_18, PWM_6, 2}, /* MR0 */
93+
{P0_19, PWM_7, 2}, /* MR1 */
94+
{P0_1 , PWM_8, 2}, /* MR2 */
95+
{P0_11, PWM_9, 3}, /* MR3 */
96+
97+
/* CT32B1 */
98+
{P0_13, PWM_10, 3}, /* MR0 */
99+
{P0_14, PWM_11, 3}, /* MR1 */
100+
{P0_15, PWM_12, 3}, /* MR2 */
101+
{P0_16, PWM_13, 2}, /* MR3 */
102+
103+
{NC, NC, 0}
104+
};

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