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Merge pull request #412 from sg-/master
[MTS_GAMBIT] Add new target support
2 parents 6663575 + 8dda44c commit 7a5896c

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‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/PeripheralNames.h renamed to ‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/PeripheralNames.h

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‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/PortNames.h

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PORTNAMES_H
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#define MBED_PORTNAMES_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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PortA = 0,
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PortB = 1,
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PortC = 2,
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PortD = 3,
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PortE = 4
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} PortName;
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#ifdef __cplusplus
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}
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#endif
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#endif

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/PeripheralPins.h

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALPINS_H
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#define MBED_PERIPHERALPINS_H
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#include "pinmap.h"
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#include "PeripheralNames.h"
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/************RTC***************/
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extern const PinMap PinMap_RTC[];
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/************ADC***************/
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extern const PinMap PinMap_ADC[];
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/************DAC***************/
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extern const PinMap PinMap_DAC[];
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/************I2C***************/
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extern const PinMap PinMap_I2C_SDA[];
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extern const PinMap PinMap_I2C_SCL[];
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/************UART***************/
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extern const PinMap PinMap_UART_TX[];
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extern const PinMap PinMap_UART_RX[];
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/************SPI***************/
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extern const PinMap PinMap_SPI_SCLK[];
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extern const PinMap PinMap_SPI_MOSI[];
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extern const PinMap PinMap_SPI_MISO[];
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extern const PinMap PinMap_SPI_SSEL[];
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/************PWM***************/
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extern const PinMap PinMap_PWM[];
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#endif

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/TARGET_FRDM/PeripheralNames.h

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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OSC32KCLK = 0,
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} RTCName;
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typedef enum {
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UART_0 = 0,
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UART_1 = 1,
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UART_2 = 2,
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UART_3 = 3,
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UART_4 = 4,
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} UARTName;
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#define STDIO_UART_TX USBTX
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#define STDIO_UART_RX USBRX
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#define STDIO_UART UART_0
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typedef enum {
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I2C_0 = 0,
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I2C_1 = 1,
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I2C_2 = 2,
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} I2CName;
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#define TPM_SHIFT 8
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typedef enum {
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PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
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PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
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PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
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PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
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PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
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PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
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PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
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PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
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PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
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PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
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PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
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PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
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PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
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PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
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PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
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PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
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PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
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PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
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PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
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PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
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PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
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PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
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PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
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PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
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// could be 4 or could be 3... not sure what register
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// this is for... too much abstraction
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PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
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PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
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PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
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PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
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PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
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PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
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PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
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PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
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} PWMName;
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#define ADC_INSTANCE_SHIFT 8
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#define ADC_B_CHANNEL_SHIFT 5
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typedef enum {
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ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
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ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
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ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
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ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
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ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
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ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
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ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
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ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
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ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
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ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
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ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
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ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
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ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
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ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | 4,
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ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | 5,
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ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | 6,
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ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | 7,
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ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
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ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
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ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
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ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
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ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
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ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
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ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
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ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
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ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
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} ADCName;
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typedef enum {
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DAC_0 = 0
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} DACName;
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typedef enum {
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SPI_0 = 0,
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SPI_1 = 1,
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SPI_2 = 2,
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} SPIName;
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#ifdef __cplusplus
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}
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#endif
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#endif

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