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Merge pull request #8719 from deepikabhavnani/m2351_ram_rom_changes
M2351 RAM / ROM defines updated
2 parents aae6bb1 + c0981a3 commit 80e2c11

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7 files changed

+141
-99
lines changed

7 files changed

+141
-99
lines changed

‎targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_MICRO/M2351.sct

Lines changed: 33 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -10,40 +10,53 @@
1010
* Secure: 32KiB
1111
* Non-secure: 64KiB
1212
*/
13+
14+
#ifndef MBED_ROM_SIZE_S
15+
#define MBED_ROM_SIZE_S (0x40000)
16+
#endif
17+
18+
#ifndef MBED_RAM_SIZE_S
19+
#define MBED_RAM_SIZE_S (0x8000)
20+
#endif
21+
22+
#ifndef NU_TZ_NSC_SIZE
23+
#define NU_TZ_NSC_SIZE (0x1000)
24+
#endif
25+
1326
#if defined(DOMAIN_NS) && DOMAIN_NS
1427

1528
#ifndef MBED_APP_START
16-
#define MBED_APP_START 0x10040000
29+
#define MBED_APP_START (0x10000000 + MBED_ROM_START + MBED_ROM_SIZE_S)
1730
#endif
1831

1932
#ifndef MBED_APP_SIZE
20-
#define MBED_APP_SIZE 0x40000
33+
#define MBED_APP_SIZE (MBED_ROM_SIZE - MBED_ROM_SIZE_S)
2134
#endif
2235

23-
#ifndef MBED_RAM_START
24-
#define MBED_RAM_START 0x30008000
36+
#ifndef MBED_RAM_APP_START
37+
#define MBED_RAM_APP_START (0x10000000 + MBED_RAM_START + MBED_RAM_SIZE_S)
2538
#endif
2639

27-
#ifndef MBED_RAM_SIZE
28-
#define MBED_RAM_SIZE 0x10000
40+
#ifndef MBED_RAM_APP_SIZE
41+
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
2942
#endif
3043

3144
#else
3245

3346
#ifndef MBED_APP_START
34-
#define MBED_APP_START 0x0
47+
#define MBED_APP_START MBED_ROM_START
3548
#endif
3649

3750
#ifndef MBED_APP_SIZE
38-
#define MBED_APP_SIZE 0x40000
51+
#define MBED_APP_SIZE MBED_ROM_SIZE_S
3952
#endif
4053

41-
#ifndef MBED_RAM_START
42-
#define MBED_RAM_START 0x20000000
54+
#ifndef MBED_RAM_APP_START
55+
#define MBED_RAM_APP_START MBED_RAM_START
4356
#endif
4457

45-
#ifndef MBED_RAM_SIZE
46-
#define MBED_RAM_SIZE 0x8000
58+
#ifndef MBED_RAM_APP_SIZE
59+
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
4760
#endif
4861

4962
#endif
@@ -55,19 +68,14 @@
5568
* 3. Greentea NVSTORE uses last 2 sectors or 4KiB x 2 for its test. Avoid this range.
5669
* 4. NSC region size defaults to 4KiB if not defined.
5770
*/
58-
#ifndef NU_TZ_NSC_START
59-
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
60-
#endif
61-
#ifndef NU_TZ_NSC_SIZE
62-
#define NU_TZ_NSC_SIZE 0x1000
63-
#endif
71+
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
6472

6573
/* Initial/ISR stack size */
6674
#if (! defined(NU_INITIAL_STACK_SIZE))
6775
#if defined(DOMAIN_NS) && DOMAIN_NS
68-
#define NU_INITIAL_STACK_SIZE 0x800
76+
#define NU_INITIAL_STACK_SIZE 0x800
6977
#else
70-
#define NU_INITIAL_STACK_SIZE 0x800
78+
#define NU_INITIAL_STACK_SIZE 0x800
7179
#endif
7280
#endif
7381

@@ -83,7 +91,7 @@ LR_IROM1 MBED_APP_START
8391
.ANY (+RO)
8492
}
8593

86-
ARM_LIB_STACK MBED_RAM_START EMPTY NU_INITIAL_STACK_SIZE
94+
ARM_LIB_STACK MBED_RAM_APP_START EMPTY NU_INITIAL_STACK_SIZE
8795
{
8896
}
8997

@@ -101,13 +109,13 @@ LR_IROM1 MBED_APP_START
101109
.ANY (+RW +ZI)
102110
}
103111

104-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
112+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
105113
{
106114
}
107115
}
108116

109117
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
110-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= MBED_RAM_START + MBED_RAM_SIZE)
118+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= MBED_RAM_APP_START + MBED_RAM_APP_SIZE)
111119

112120
#else
113121

@@ -139,7 +147,7 @@ LR_IROM1 MBED_APP_START
139147
.ANY (+RW +ZI)
140148
}
141149

142-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
150+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
143151
{
144152
}
145153
}
@@ -160,6 +168,6 @@ ScatterAssert(LoadLimit(LR_IROM1) <= NU_TZ_NSC_START)
160168
ScatterAssert(LoadLimit(LR_IROM_NSC) <= (NU_TZ_NSC_START + NU_TZ_NSC_SIZE))
161169
/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000 */
162170
ScatterAssert(LoadBase(LR_IROM_NSC) >= 0x4000)
163-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE))
171+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE))
164172

165173
#endif

‎targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_STD/M2351.sct

Lines changed: 33 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -10,40 +10,53 @@
1010
* Secure: 32KiB
1111
* Non-secure: 64KiB
1212
*/
13+
14+
#ifndef MBED_ROM_SIZE_S
15+
#define MBED_ROM_SIZE_S (0x40000)
16+
#endif
17+
18+
#ifndef MBED_RAM_SIZE_S
19+
#define MBED_RAM_SIZE_S (0x8000)
20+
#endif
21+
22+
#ifndef NU_TZ_NSC_SIZE
23+
#define NU_TZ_NSC_SIZE (0x1000)
24+
#endif
25+
1326
#if defined(DOMAIN_NS) && DOMAIN_NS
1427

1528
#ifndef MBED_APP_START
16-
#define MBED_APP_START 0x10040000
29+
#define MBED_APP_START (0x10000000 + MBED_ROM_START + MBED_ROM_SIZE_S)
1730
#endif
1831

1932
#ifndef MBED_APP_SIZE
20-
#define MBED_APP_SIZE 0x40000
33+
#define MBED_APP_SIZE (MBED_ROM_SIZE - MBED_ROM_SIZE_S)
2134
#endif
2235

23-
#ifndef MBED_RAM_START
24-
#define MBED_RAM_START 0x30008000
36+
#ifndef MBED_RAM_APP_START
37+
#define MBED_RAM_APP_START (0x10000000 + MBED_RAM_START + MBED_RAM_SIZE_S)
2538
#endif
2639

27-
#ifndef MBED_RAM_SIZE
28-
#define MBED_RAM_SIZE 0x10000
40+
#ifndef MBED_RAM_APP_SIZE
41+
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
2942
#endif
3043

3144
#else
3245

3346
#ifndef MBED_APP_START
34-
#define MBED_APP_START 0x0
47+
#define MBED_APP_START MBED_ROM_START
3548
#endif
3649

3750
#ifndef MBED_APP_SIZE
38-
#define MBED_APP_SIZE 0x40000
51+
#define MBED_APP_SIZE MBED_ROM_SIZE_S
3952
#endif
4053

41-
#ifndef MBED_RAM_START
42-
#define MBED_RAM_START 0x20000000
54+
#ifndef MBED_RAM_APP_START
55+
#define MBED_RAM_APP_START MBED_RAM_START
4356
#endif
4457

45-
#ifndef MBED_RAM_SIZE
46-
#define MBED_RAM_SIZE 0x8000
58+
#ifndef MBED_RAM_APP_SIZE
59+
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
4760
#endif
4861

4962
#endif
@@ -55,19 +68,14 @@
5568
* 3. Greentea NVSTORE uses last 2 sectors or 4KiB x 2 for its test. Avoid this range.
5669
* 4. NSC region size defaults to 4KiB if not defined.
5770
*/
58-
#ifndef NU_TZ_NSC_START
59-
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
60-
#endif
61-
#ifndef NU_TZ_NSC_SIZE
62-
#define NU_TZ_NSC_SIZE 0x1000
63-
#endif
71+
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
6472

6573
/* Initial/ISR stack size */
6674
#if (! defined(NU_INITIAL_STACK_SIZE))
6775
#if defined(DOMAIN_NS) && DOMAIN_NS
68-
#define NU_INITIAL_STACK_SIZE 0x800
76+
#define NU_INITIAL_STACK_SIZE 0x800
6977
#else
70-
#define NU_INITIAL_STACK_SIZE 0x800
78+
#define NU_INITIAL_STACK_SIZE 0x800
7179
#endif
7280
#endif
7381

@@ -83,7 +91,7 @@ LR_IROM1 MBED_APP_START
8391
.ANY (+RO)
8492
}
8593

86-
ARM_LIB_STACK MBED_RAM_START EMPTY NU_INITIAL_STACK_SIZE
94+
ARM_LIB_STACK MBED_RAM_APP_START EMPTY NU_INITIAL_STACK_SIZE
8795
{
8896
}
8997

@@ -101,13 +109,13 @@ LR_IROM1 MBED_APP_START
101109
.ANY (+RW +ZI)
102110
}
103111

104-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
112+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
105113
{
106114
}
107115
}
108116

109117
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
110-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= MBED_RAM_START + MBED_RAM_SIZE)
118+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= MBED_RAM_APP_START + MBED_RAM_APP_SIZE)
111119

112120
#else
113121

@@ -139,7 +147,7 @@ LR_IROM1 MBED_APP_START
139147
.ANY (+RW +ZI)
140148
}
141149

142-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
150+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
143151
{
144152
}
145153
}
@@ -160,6 +168,6 @@ ScatterAssert(LoadLimit(LR_IROM1) <= NU_TZ_NSC_START)
160168
ScatterAssert(LoadLimit(LR_IROM_NSC) <= (NU_TZ_NSC_START + NU_TZ_NSC_SIZE))
161169
/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000 */
162170
ScatterAssert(LoadBase(LR_IROM_NSC) >= 0x4000)
163-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE))
171+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE))
164172

165173
#endif

‎targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld

Lines changed: 27 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -12,40 +12,53 @@
1212
* Secure: 32KiB
1313
* Non-secure: 64KiB
1414
*/
15+
16+
#ifndef MBED_ROM_SIZE_S
17+
#define MBED_ROM_SIZE_S (0x40000)
18+
#endif
19+
20+
#ifndef MBED_RAM_SIZE_S
21+
#define MBED_RAM_SIZE_S (0x8000)
22+
#endif
23+
24+
#ifndef NU_TZ_NSC_SIZE
25+
#define NU_TZ_NSC_SIZE (0x1000)
26+
#endif
27+
1528
#if defined(DOMAIN_NS) && DOMAIN_NS
1629

1730
#ifndef MBED_APP_START
18-
#define MBED_APP_START 0x10040000
31+
#define MBED_APP_START (0x10000000 + MBED_ROM_START + MBED_ROM_SIZE_S)
1932
#endif
2033

2134
#ifndef MBED_APP_SIZE
22-
#define MBED_APP_SIZE 0x40000
35+
#define MBED_APP_SIZE (MBED_ROM_SIZE - MBED_ROM_SIZE_S)
2336
#endif
2437

25-
#ifndef MBED_RAM_START
26-
#define MBED_RAM_START 0x30008000
38+
#ifndef MBED_RAM_APP_START
39+
#define MBED_RAM_APP_START (0x10000000 + MBED_RAM_START + MBED_RAM_SIZE_S)
2740
#endif
2841

29-
#ifndef MBED_RAM_SIZE
30-
#define MBED_RAM_SIZE 0x10000
42+
#ifndef MBED_RAM_APP_SIZE
43+
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
3144
#endif
3245

3346
#else
3447

3548
#ifndef MBED_APP_START
36-
#define MBED_APP_START 0x0
49+
#define MBED_APP_START MBED_ROM_START
3750
#endif
3851

3952
#ifndef MBED_APP_SIZE
40-
#define MBED_APP_SIZE 0x40000
53+
#define MBED_APP_SIZE MBED_ROM_SIZE_S
4154
#endif
4255

43-
#ifndef MBED_RAM_START
44-
#define MBED_RAM_START 0x20000000
56+
#ifndef MBED_RAM_APP_START
57+
#define MBED_RAM_APP_START MBED_RAM_START
4558
#endif
4659

47-
#ifndef MBED_RAM_SIZE
48-
#define MBED_RAM_SIZE 0x8000
60+
#ifndef MBED_RAM_APP_SIZE
61+
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
4962
#endif
5063

5164
#endif
@@ -66,9 +79,6 @@ StackSize = 0x800;
6679
#ifndef NU_TZ_NSC_START
6780
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
6881
#endif
69-
#ifndef NU_TZ_NSC_SIZE
70-
#define NU_TZ_NSC_SIZE 0x1000
71-
#endif
7282

7383

7484
#if defined(DOMAIN_NS) && DOMAIN_NS
@@ -77,7 +87,7 @@ MEMORY
7787
{
7888
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
7989
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400
80-
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
90+
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
8191
}
8292

8393
#else
@@ -87,7 +97,7 @@ MEMORY
8797
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
8898
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = NU_TZ_NSC_START - MBED_APP_START - 0x400
8999
NSC_FLASH (rx) : ORIGIN = NU_TZ_NSC_START, LENGTH = NU_TZ_NSC_SIZE
90-
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
100+
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
91101
}
92102

93103
#endif

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