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2 | 2 | ******************************************************************************
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3 | 3 | * @file stm32f4xx.h
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4 | 4 | * @author MCD Application Team
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5 |
| - * @version V2.4.2 |
6 |
| - * @date 13-November-2015 |
| 5 | + * @version V2.4.3 |
| 6 | + * @date 22-January-2016 |
7 | 7 | * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
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8 | 8 | *
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9 | 9 | * The file is the unique include file that the application programmer
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18 | 18 | ******************************************************************************
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19 | 19 | * @attention
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20 | 20 | *
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21 |
| - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| 21 | + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
22 | 22 | *
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23 | 23 | * Redistribution and use in source and binary forms, with or without modification,
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24 | 24 | * are permitted provided that the following conditions are met:
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77 | 77 | #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
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78 | 78 | !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
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79 | 79 | !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \
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80 |
| - !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \ |
81 |
| - !defined (STM32F479xx) |
| 80 | + !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \ |
| 81 | + !defined (STM32F479xx) |
82 | 82 | /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
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83 | 83 | /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
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84 | 84 | /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
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116 | 116 | #endif /* USE_HAL_DRIVER */
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117 | 117 |
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118 | 118 | /**
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119 |
| - * @brief CMSIS Device version number V2.4.2 |
| 119 | + * @brief CMSIS version number V2.4.3 |
120 | 120 | */
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121 |
| -#define __STM32F4xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */ |
122 |
| -#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 (0x04) /*!< [23:16] sub1 version */ |
123 |
| -#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ |
124 |
| -#define __STM32F4xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ |
125 |
| -#define __STM32F4xx_CMSIS_DEVICE_VERSION ((__STM32F4xx_CMSIS_DEVICE_VERSION_MAIN << 24)\ |
126 |
| - |(__STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 << 16)\ |
127 |
| - |(__STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 << 8 )\ |
128 |
| - |(__STM32F4xx_CMSIS_DEVICE_VERSION)) |
| 121 | +#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */ |
| 122 | +#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ |
| 123 | +#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */ |
| 124 | +#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ |
| 125 | +#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\ |
| 126 | + |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\ |
| 127 | + |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\ |
| 128 | + |(__STM32F4xx_CMSIS_VERSION)) |
129 | 129 |
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130 | 130 | /**
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131 | 131 | * @}
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182 | 182 | */
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183 | 183 | typedef enum
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184 | 184 | {
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185 |
| - RESET = 0, |
| 185 | + RESET = 0U, |
186 | 186 | SET = !RESET
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187 | 187 | } FlagStatus, ITStatus;
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188 | 188 |
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189 | 189 | typedef enum
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190 | 190 | {
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191 |
| - DISABLE = 0, |
| 191 | + DISABLE = 0U, |
192 | 192 | ENABLE = !DISABLE
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193 | 193 | } FunctionalState;
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194 | 194 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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195 | 195 |
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196 | 196 | typedef enum
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197 | 197 | {
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198 |
| - ERROR = 0, |
| 198 | + ERROR = 0U, |
199 | 199 | SUCCESS = !ERROR
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200 | 200 | } ErrorStatus;
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201 | 201 |
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