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STM32G0: Update G071xx toolchain files with default files
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6 files changed

+94
-79
lines changed

6 files changed

+94
-79
lines changed

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/startup_stm32g071xx.S

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,9 +32,9 @@
3232
EXPORT __Vectors
3333
EXPORT __Vectors_End
3434
EXPORT __Vectors_Size
35-
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
3635

37-
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
36+
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
37+
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
3838
DCD Reset_Handler ; Reset Handler
3939
DCD NMI_Handler ; NMI Handler
4040
DCD HardFault_Handler ; Hard Fault Handler
@@ -197,6 +197,11 @@ CEC_IRQHandler
197197
ENDP
198198

199199
ALIGN
200+
201+
;*******************************************************************************
202+
; User Stack and Heap initialization
203+
;*******************************************************************************
204+
200205
END
201206

202207
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM_STD/stm32g071xx.sct

Lines changed: 17 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
;******************************************************************************
66
;* @attention
77
;*
8-
;* Copyright (c) 2016 STMicroelectronics.
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
99
;* All rights reserved.
1010
;*
1111
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -14,46 +14,40 @@
1414
;* opensource.org/licenses/BSD-3-Clause
1515
;*
1616
;******************************************************************************
17+
1718
#include "../cmsis_nvic.h"
1819

1920
#if !defined(MBED_APP_START)
20-
#define MBED_APP_START MBED_ROM_START
21+
#define MBED_APP_START MBED_ROM_START
2122
#endif
2223

2324
#if !defined(MBED_APP_SIZE)
24-
#define MBED_APP_SIZE MBED_ROM_SIZE
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
2526
#endif
2627

2728
#if !defined(MBED_BOOT_STACK_SIZE)
28-
#define MBED_BOOT_STACK_SIZE 0x400
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#define MBED_BOOT_STACK_SIZE 0x400
2931
#endif
3032

31-
#define Stack_Size MBED_BOOT_STACK_SIZE
32-
33-
#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS)
34-
#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
35-
36-
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
37-
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
38-
39-
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
40-
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
33+
/* Round up VECTORS_SIZE to 8 bytes */
34+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
4135

42-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
36+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
4337

44-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
45-
*.o (RESET, +First)
46-
*(InRoot$$Sections)
47-
.ANY (+RO)
38+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
39+
*.o (RESET, +First)
40+
*(InRoot$$Sections)
41+
.ANY (+RO)
4842
}
4943

50-
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
44+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
45+
.ANY (+RW +ZI)
5146
}
5247

53-
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
54-
.ANY (+RW +ZI)
48+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
5549
}
5650

57-
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
51+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
5852
}
5953
}

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/startup_stm32g071xx.S

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -17,15 +17,15 @@
1717
* Copyright (c) 2018 STMicroelectronics. All rights reserved.
1818
*
1919
* This software component is licensed by ST under BSD 3-Clause license,
20-
* the "License"; You may not use this file except in compliance with the
20+
* the "License"; You may not use this file except in compliance with the
2121
* License. You may obtain a copy of the License at:
2222
* opensource.org/licenses/BSD-3-Clause
2323
*
2424
******************************************************************************
2525
*/
2626

2727
.syntax unified
28-
.cpu cortex-m0plus
28+
.cpu cortex-m0
2929
.fpu softvfp
3030
.thumb
3131

@@ -83,11 +83,8 @@ LoopFillZerobss:
8383

8484
/* Call the clock system intitialization function.*/
8585
bl SystemInit
86-
/* Call static constructors */
87-
//bl __libc_init_array
88-
/* Call the application's entry point.*/
89-
//bl main
90-
bl _start
86+
bl _start
87+
bx lr
9188

9289
LoopForever:
9390
b LoopForever

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld

Lines changed: 35 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
******************************************************************************
55
* @attention
66
*
7-
* Copyright (c) 2016 STMicroelectronics.
7+
* Copyright (c) 2016-2020 STMicroelectronics.
88
* All rights reserved.
99
*
1010
* This software component is licensed by ST under BSD 3-Clause license,
@@ -14,44 +14,38 @@
1414
*
1515
******************************************************************************
1616
*/
17+
1718
#include "../cmsis_nvic.h"
1819

20+
1921
#if !defined(MBED_APP_START)
20-
#define MBED_APP_START MBED_ROM_START
22+
#define MBED_APP_START MBED_ROM_START
2123
#endif
2224

2325
#if !defined(MBED_APP_SIZE)
24-
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
#define MBED_APP_SIZE MBED_ROM_SIZE
2527
#endif
2628

27-
2829
#if !defined(MBED_BOOT_STACK_SIZE)
29-
#define MBED_BOOT_STACK_SIZE 0x400
30+
/* This value is normally defined by the tools
31+
to 0x1000 for bare metal and 0x400 for RTOS */
32+
#define MBED_BOOT_STACK_SIZE 0x400
3033
#endif
31-
STACK_SIZE = MBED_BOOT_STACK_SIZE;
32-
33-
#define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS)
34-
#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
35-
36-
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
37-
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
38-
39-
40-
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
41-
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
4234

35+
/* Round up VECTORS_SIZE to 8 bytes */
36+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
4337

4438
MEMORY
45-
{
46-
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
47-
RAM (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
39+
{
40+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
41+
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
4842
}
4943

5044
/* Linker script to place sections and symbol values. Should be used together
5145
* with other linker script that defines memory regions FLASH and RAM.
5246
* It references following symbols, which must be defined in code:
5347
* Reset_Handler : Entry of reset handler
54-
*
48+
*
5549
* It defines following symbols, which code can use without definition:
5650
* __exidx_start
5751
* __exidx_end
@@ -82,6 +76,7 @@ SECTIONS
8276
{
8377
KEEP(*(.isr_vector))
8478
*(.text*)
79+
8580
KEEP(*(.init))
8681
KEEP(*(.fini))
8782

@@ -116,21 +111,12 @@ SECTIONS
116111
} > FLASH
117112
__exidx_end = .;
118113

119-
__etext = .;
114+
/* Location counter can end up 2byte aligned with narrow Thumb code but
115+
__etext is assumed by startup code to be the LMA of a section in RAM
116+
which must be 8-byte aligned */
117+
__etext = ALIGN (8);
120118
_sidata = .;
121119

122-
.crash_data_ram :
123-
{
124-
. = ALIGN(8);
125-
__CRASH_DATA_RAM__ = .;
126-
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
127-
KEEP(*(.keep.crash_data_ram))
128-
*(.m_crash_data_ram) /* This is a user defined section */
129-
. += MBED_CRASH_REPORT_RAM_SIZE;
130-
. = ALIGN(8);
131-
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
132-
} > RAM
133-
134120
.data : AT (__etext)
135121
{
136122
__data_start__ = .;
@@ -151,7 +137,6 @@ SECTIONS
151137
KEEP(*(.init_array))
152138
PROVIDE_HIDDEN (__init_array_end = .);
153139

154-
155140
. = ALIGN(8);
156141
/* finit data */
157142
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -167,6 +152,19 @@ SECTIONS
167152

168153
} > RAM
169154

155+
/* Uninitialized data section
156+
* This region is not initialized by the C/C++ library and can be used to
157+
* store state across soft reboots. */
158+
.uninitialized (NOLOAD):
159+
{
160+
. = ALIGN(32);
161+
__uninitialized_start = .;
162+
*(.uninitialized)
163+
KEEP(*(.keep.uninitialized))
164+
. = ALIGN(32);
165+
__uninitialized_end = .;
166+
} > RAM
167+
170168
.bss :
171169
{
172170
. = ALIGN(8);
@@ -182,9 +180,9 @@ SECTIONS
182180
.heap (COPY):
183181
{
184182
__end__ = .;
185-
end = __end__;
183+
PROVIDE(end = .);
186184
*(.heap*)
187-
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
185+
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
188186
__HeapLimit = .;
189187
} > RAM
190188

@@ -200,7 +198,7 @@ SECTIONS
200198
* size of stack_dummy section */
201199
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
202200
_estack = __StackTop;
203-
__StackLimit = __StackTop - STACK_SIZE;
201+
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
204202
PROVIDE(__stack = __StackTop);
205203

206204
/* Check if data + heap + stack exceeds RAM limit */

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
******************************************************************************
55
* @attention
66
*
7-
* Copyright (c) 2016 STMicroelectronics.
7+
* Copyright (c) 2016-2020 STMicroelectronics.
88
* All rights reserved.
99
*
1010
* This software component is licensed by ST under BSD 3-Clause license,
@@ -18,7 +18,7 @@
1818

1919
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
2020

21-
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS */
21+
define symbol VECTORS = 47; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
2222
define symbol HEAP_SIZE = 0x2000;
2323

2424
/* Common - Do not change */
Lines changed: 29 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,46 @@
11
/* mbed Microcontroller Library
22
* SPDX-License-Identifier: BSD-3-Clause
33
******************************************************************************
4+
* @attention
45
*
5-
* Copyright (c) 2014 STMicroelectronics.
6-
* All rights reserved.
6+
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
7+
* All rights reserved.</center></h2>
78
*
89
* This software component is licensed by ST under BSD 3-Clause license,
910
* the "License"; You may not use this file except in compliance with the
1011
* License. You may obtain a copy of the License at:
1112
* opensource.org/licenses/BSD-3-Clause
1213
*
1314
******************************************************************************
14-
*/
15+
*/
1516

1617
#ifndef MBED_CMSIS_NVIC_H
1718
#define MBED_CMSIS_NVIC_H
1819

19-
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
20-
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF
21-
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
22-
#define NVIC_NUM_VECTORS 48
23-
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
20+
#if !defined(MBED_ROM_START)
21+
#define MBED_ROM_START 0x8000000
22+
#endif
23+
24+
#if !defined(MBED_ROM_SIZE)
25+
#if defined (TARGET_NUCLEO_G071RB)
26+
#define MBED_ROM_SIZE 0x20000
27+
#else
28+
// 0x10000 STM32G071C8Ux STM32G071K8TxN STM32G071R8Tx STM32G071K8Ux STM32G071G8UxN STM32G071C8Tx STM32G071K8Tx STM32G071K8UxN STM32G071G8Ux
29+
// 0x8000 STM32G071K6Tx STM32G071G6Ux STM32G071C6Tx STM32G071K6Ux STM32G071R6Tx STM32G071C6Ux
30+
// 0x20000 STM32G071GBUxN STM32G071CBUx STM32G071KBTx STM32G071KBUxN STM32G071RBTx STM32G071EBYx STM32G071GBUx STM32G071CBTx STM32G071KBUx STM32G071RBIx STM32G071KBTxN
31+
#error "MBED_ROM_SIZE not defined"
32+
#endif
33+
#endif
34+
35+
#if !defined(MBED_RAM_START)
36+
#define MBED_RAM_START 0x20000000
37+
#endif
38+
39+
#if !defined(MBED_RAM_SIZE)
40+
#define MBED_RAM_SIZE 0x9000
41+
#endif
42+
43+
#define NVIC_NUM_VECTORS 47
44+
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
2445

2546
#endif

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